David Nieto c123d5056d gpu: nvgpu: gpu: read effective frequence from counter ...

(1) modified counters debug code to export to the driver
(2) modified arbiter to read from those functions
(3) modified counter for higher accuracy on MHz range

JIRA DNVGPU-164

Change-Id: I2bbf7c9be4dc59718d1d91c53028a39020b5aea5
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1239467
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1268008

2016-12-27 15:26:52 +05:30

..

clk_arb.c

gpu: nvgpu: gpu: read effective frequence from counter

2016-12-27 15:26:52 +05:30

clk_arb.h

nvgpu: gpu: arbiter for vf switch management

2016-12-27 15:26:52 +05:30

clk_common.c

gpu: nvgpu: fix round_rate ops for CCF

2016-12-20 23:05:56 -08:00

clk_domain.c

gpu: nvgpu: create function to program coreclk

2016-12-27 15:26:50 +05:30

clk_domain.h

gpu: nvgpu: create function to program coreclk

2016-12-27 15:26:50 +05:30

clk_fll.c

gpu: nvgpu: Add dGPU clocks support

2016-12-27 15:26:49 +05:30

clk_fll.h

gpu: nvgpu: Add dGPU clocks support

2016-12-27 15:26:49 +05:30

clk_mclk.c

nvgpu: gpu: Use pstates for MCLK range

2016-12-27 15:26:52 +05:30

clk_mclk.h

nvgpu: gpu: Use pstates for MCLK range

2016-12-27 15:26:52 +05:30

clk_prog.c

gpu: nvgpu: fix sram rail volt calculation

2016-12-27 15:26:50 +05:30

clk_prog.h

gpu: nvgpu: create function to program coreclk

2016-12-27 15:26:50 +05:30

clk_vf_point.c

gpu: nvgpu: add support to cache VF table from PMU

2016-12-27 15:26:50 +05:30

clk_vf_point.h

gpu: nvgpu: support to parse VF table

2016-12-27 15:26:50 +05:30

clk_vin.c

gpu: nvgpu: Add dGPU clocks support

2016-12-27 15:26:49 +05:30

clk_vin.h

gpu: nvgpu: Add dGPU clocks support

2016-12-27 15:26:49 +05:30

clk.c

nvgpu: gpu: arbiter for vf switch management

2016-12-27 15:26:52 +05:30

clk.h

nvgpu: gpu: arbiter for vf switch management

2016-12-27 15:26:52 +05:30