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git://nv-tegra.nvidia.com/linux-nvgpu.git
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Update the high level mapping logic. Instead of iterating over the GPU VA iterate over the scatter-gather table chunks. As a result each GMMU page table update call is simplified dramatically. This also modifies the chip level code to no longer require an SGL as an argument. Each call to the chip level code will be guaranteed to be contiguous so it only has to worry about making a mapping from virt -> phys. This removes the dependency on Linux that the chip code currently has. With this patch the core GMMU code still uses the Linux SGL but the logic is highly transferable to a different, nvgpu specific, scatter gather list format in the near future. The last major update is to push most of the page table attribute arguments to a struct. That struct is passed on through the various mapping levels. This makes the funtions calls more simple and easier to follow. JIRA NVGPU-30 Change-Id: Ibb6b11755f99818fe642622ca0bd4cbed054f602 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master/r/1484104 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
612 lines
16 KiB
C
612 lines
16 KiB
C
/*
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* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <nvgpu/log.h>
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#include <nvgpu/dma.h>
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#include <nvgpu/vm.h>
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#include <nvgpu/vm_area.h>
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#include <nvgpu/gmmu.h>
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#include <nvgpu/lock.h>
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#include <nvgpu/list.h>
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#include <nvgpu/rbtree.h>
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#include <nvgpu/semaphore.h>
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#include <nvgpu/enabled.h>
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#include <nvgpu/vgpu/vm.h>
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#include "gk20a/gk20a.h"
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#include "gk20a/mm_gk20a.h"
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int vm_aspace_id(struct vm_gk20a *vm)
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{
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return vm->as_share ? vm->as_share->id : -1;
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}
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static void nvgpu_vm_free_entries(struct vm_gk20a *vm,
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struct nvgpu_gmmu_pd *parent,
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int level)
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{
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int i;
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if (parent->entries)
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for (i = 0; i < parent->num_entries; i++)
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nvgpu_vm_free_entries(vm, &parent->entries[i],
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level + 1);
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if (parent->mem.size)
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nvgpu_free_gmmu_pages(vm, parent);
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nvgpu_vfree(vm->mm->g, parent->entries);
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parent->entries = NULL;
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}
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u64 __nvgpu_vm_alloc_va(struct vm_gk20a *vm, u64 size,
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enum gmmu_pgsz_gk20a pgsz_idx)
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{
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struct gk20a *g = vm->mm->g;
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struct nvgpu_allocator *vma = NULL;
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u64 addr;
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u64 page_size = vm->gmmu_page_sizes[pgsz_idx];
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vma = vm->vma[pgsz_idx];
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if (pgsz_idx >= gmmu_nr_page_sizes) {
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nvgpu_err(g, "(%s) invalid page size requested", vma->name);
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return 0;
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}
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if ((pgsz_idx == gmmu_page_size_big) && !vm->big_pages) {
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nvgpu_err(g, "(%s) unsupportd page size requested", vma->name);
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return 0;
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}
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/* Be certain we round up to page_size if needed */
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size = (size + ((u64)page_size - 1)) & ~((u64)page_size - 1);
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addr = nvgpu_alloc(vma, size);
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if (!addr) {
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nvgpu_err(g, "(%s) oom: sz=0x%llx", vma->name, size);
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return 0;
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}
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return addr;
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}
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int __nvgpu_vm_free_va(struct vm_gk20a *vm, u64 addr,
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enum gmmu_pgsz_gk20a pgsz_idx)
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{
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struct nvgpu_allocator *vma = vm->vma[pgsz_idx];
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nvgpu_free(vma, addr);
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return 0;
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}
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void nvgpu_vm_mapping_batch_start(struct vm_gk20a_mapping_batch *mapping_batch)
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{
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memset(mapping_batch, 0, sizeof(*mapping_batch));
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mapping_batch->gpu_l2_flushed = false;
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mapping_batch->need_tlb_invalidate = false;
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}
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void nvgpu_vm_mapping_batch_finish_locked(
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struct vm_gk20a *vm, struct vm_gk20a_mapping_batch *mapping_batch)
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{
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/* hanging kref_put batch pointer? */
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WARN_ON(vm->kref_put_batch == mapping_batch);
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if (mapping_batch->need_tlb_invalidate) {
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struct gk20a *g = gk20a_from_vm(vm);
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g->ops.fb.tlb_invalidate(g, &vm->pdb.mem);
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}
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}
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void nvgpu_vm_mapping_batch_finish(struct vm_gk20a *vm,
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struct vm_gk20a_mapping_batch *mapping_batch)
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{
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nvgpu_mutex_acquire(&vm->update_gmmu_lock);
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nvgpu_vm_mapping_batch_finish_locked(vm, mapping_batch);
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nvgpu_mutex_release(&vm->update_gmmu_lock);
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}
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/*
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* Determine if the passed address space can support big pages or not.
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*/
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int nvgpu_big_pages_possible(struct vm_gk20a *vm, u64 base, u64 size)
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{
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u64 mask = ((u64)vm->big_page_size << 10) - 1;
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if (base & mask || size & mask)
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return 0;
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return 1;
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}
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/*
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* Initialize a semaphore pool. Just return successfully if we do not need
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* semaphores (i.e when sync-pts are active).
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*/
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static int nvgpu_init_sema_pool(struct vm_gk20a *vm)
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{
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struct nvgpu_semaphore_sea *sema_sea;
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struct mm_gk20a *mm = vm->mm;
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struct gk20a *g = mm->g;
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int err;
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/*
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* Don't waste the memory on semaphores if we don't need them.
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*/
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if (g->gpu_characteristics.flags & NVGPU_GPU_FLAGS_HAS_SYNCPOINTS)
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return 0;
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if (vm->sema_pool)
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return 0;
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sema_sea = nvgpu_semaphore_sea_create(g);
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if (!sema_sea)
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return -ENOMEM;
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vm->sema_pool = nvgpu_semaphore_pool_alloc(sema_sea);
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if (!vm->sema_pool)
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return -ENOMEM;
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/*
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* Allocate a chunk of GPU VA space for mapping the semaphores. We will
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* do a fixed alloc in the kernel VM so that all channels have the same
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* RO address range for the semaphores.
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*
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* !!! TODO: cleanup.
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*/
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sema_sea->gpu_va = nvgpu_alloc_fixed(&vm->kernel,
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vm->va_limit -
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mm->channel.kernel_size,
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512 * PAGE_SIZE,
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SZ_4K);
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if (!sema_sea->gpu_va) {
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nvgpu_free(&vm->kernel, sema_sea->gpu_va);
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nvgpu_vm_put(vm);
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return -ENOMEM;
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}
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err = nvgpu_semaphore_pool_map(vm->sema_pool, vm);
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if (err) {
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nvgpu_semaphore_pool_unmap(vm->sema_pool, vm);
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nvgpu_free(vm->vma[gmmu_page_size_small],
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vm->sema_pool->gpu_va);
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return err;
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}
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return 0;
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}
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static int __nvgpu_vm_init(struct mm_gk20a *mm,
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struct vm_gk20a *vm,
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u32 big_page_size,
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u64 low_hole,
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u64 kernel_reserved,
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u64 aperture_size,
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bool big_pages,
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bool userspace_managed,
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char *name)
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{
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int err;
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char alloc_name[32];
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u64 kernel_vma_flags;
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u64 user_vma_start, user_vma_limit;
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u64 user_lp_vma_start, user_lp_vma_limit;
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u64 kernel_vma_start, kernel_vma_limit;
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struct gk20a *g = gk20a_from_mm(mm);
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if (WARN_ON(kernel_reserved + low_hole > aperture_size))
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return -ENOMEM;
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nvgpu_log_info(g, "Init space for %s: valimit=0x%llx, "
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"LP size=0x%x lowhole=0x%llx",
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name, aperture_size,
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(unsigned int)big_page_size, low_hole);
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vm->mm = mm;
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vm->gmmu_page_sizes[gmmu_page_size_small] = SZ_4K;
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vm->gmmu_page_sizes[gmmu_page_size_big] = big_page_size;
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vm->gmmu_page_sizes[gmmu_page_size_kernel] = SZ_4K;
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/* Set up vma pointers. */
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vm->vma[gmmu_page_size_small] = &vm->user;
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vm->vma[gmmu_page_size_big] = &vm->user;
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vm->vma[gmmu_page_size_kernel] = &vm->kernel;
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if (!nvgpu_is_enabled(g, NVGPU_MM_UNIFY_ADDRESS_SPACES))
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vm->vma[gmmu_page_size_big] = &vm->user_lp;
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vm->va_start = low_hole;
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vm->va_limit = aperture_size;
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vm->big_page_size = vm->gmmu_page_sizes[gmmu_page_size_big];
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vm->userspace_managed = userspace_managed;
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vm->mmu_levels = g->ops.mm.get_mmu_levels(g, vm->big_page_size);
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#ifdef CONFIG_TEGRA_GR_VIRTUALIZATION
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if (g->is_virtual && userspace_managed) {
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nvgpu_err(g, "vGPU: no userspace managed addr space support");
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return -ENOSYS;
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}
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if (g->is_virtual && vgpu_vm_init(g, vm)) {
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nvgpu_err(g, "Failed to init vGPU VM!");
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return -ENOMEM;
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}
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#endif
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/* Initialize the page table data structures. */
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strncpy(vm->name, name, min(strlen(name), sizeof(vm->name)));
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err = nvgpu_gmmu_init_page_table(vm);
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if (err)
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goto clean_up_vgpu_vm;
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/* Setup vma limits. */
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if (kernel_reserved + low_hole < aperture_size) {
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/*
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* If big_pages are disabled for this VM then it only makes
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* sense to make one VM, same as if the unified address flag
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* is set.
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*/
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if (!big_pages ||
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nvgpu_is_enabled(g, NVGPU_MM_UNIFY_ADDRESS_SPACES)) {
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user_vma_start = low_hole;
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user_vma_limit = vm->va_limit - kernel_reserved;
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user_lp_vma_start = user_vma_limit;
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user_lp_vma_limit = user_vma_limit;
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} else {
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user_vma_start = low_hole;
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user_vma_limit = __nv_gmmu_va_small_page_limit();
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user_lp_vma_start = __nv_gmmu_va_small_page_limit();
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user_lp_vma_limit = vm->va_limit - kernel_reserved;
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}
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} else {
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user_vma_start = 0;
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user_vma_limit = 0;
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user_lp_vma_start = 0;
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user_lp_vma_limit = 0;
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}
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kernel_vma_start = vm->va_limit - kernel_reserved;
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kernel_vma_limit = vm->va_limit;
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nvgpu_log_info(g, "user_vma [0x%llx,0x%llx)",
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user_vma_start, user_vma_limit);
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nvgpu_log_info(g, "user_lp_vma [0x%llx,0x%llx)",
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user_lp_vma_start, user_lp_vma_limit);
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nvgpu_log_info(g, "kernel_vma [0x%llx,0x%llx)",
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kernel_vma_start, kernel_vma_limit);
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if (WARN_ON(user_vma_start > user_vma_limit) ||
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WARN_ON(user_lp_vma_start > user_lp_vma_limit) ||
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WARN_ON(kernel_vma_start >= kernel_vma_limit)) {
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err = -EINVAL;
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goto clean_up_page_tables;
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}
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kernel_vma_flags = (kernel_reserved + low_hole) == aperture_size ?
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0 : GPU_ALLOC_GVA_SPACE;
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/*
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* A "user" area only makes sense for the GVA spaces. For VMs where
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* there is no "user" area user_vma_start will be equal to
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* user_vma_limit (i.e a 0 sized space). In such a situation the kernel
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* area must be non-zero in length.
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*/
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if (user_vma_start >= user_vma_limit &&
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kernel_vma_start >= kernel_vma_limit) {
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err = -EINVAL;
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goto clean_up_page_tables;
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}
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/*
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* Determine if big pages are possible in this VM. If a split address
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* space is used then check the user_lp vma instead of the user vma.
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*/
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if (nvgpu_is_enabled(g, NVGPU_MM_UNIFY_ADDRESS_SPACES))
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vm->big_pages = big_pages &&
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nvgpu_big_pages_possible(vm, user_vma_start,
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user_vma_limit - user_vma_start);
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else
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vm->big_pages = big_pages &&
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nvgpu_big_pages_possible(vm, user_lp_vma_start,
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user_lp_vma_limit - user_lp_vma_start);
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/*
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* User VMA.
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*/
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if (user_vma_start < user_vma_limit) {
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snprintf(alloc_name, sizeof(alloc_name), "gk20a_%s", name);
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err = __nvgpu_buddy_allocator_init(g, &vm->user,
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vm, alloc_name,
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user_vma_start,
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user_vma_limit -
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user_vma_start,
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SZ_4K,
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GPU_BALLOC_MAX_ORDER,
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GPU_ALLOC_GVA_SPACE);
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if (err)
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goto clean_up_page_tables;
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} else {
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/*
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* Make these allocator pointers point to the kernel allocator
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* since we still use the legacy notion of page size to choose
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* the allocator.
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*/
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vm->vma[0] = &vm->kernel;
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vm->vma[1] = &vm->kernel;
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}
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/*
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* User VMA for large pages when a split address range is used.
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*/
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if (user_lp_vma_start < user_lp_vma_limit) {
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snprintf(alloc_name, sizeof(alloc_name), "gk20a_%s_lp", name);
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err = __nvgpu_buddy_allocator_init(g, &vm->user_lp,
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vm, alloc_name,
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user_lp_vma_start,
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user_lp_vma_limit -
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user_lp_vma_start,
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vm->big_page_size,
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GPU_BALLOC_MAX_ORDER,
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GPU_ALLOC_GVA_SPACE);
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if (err)
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goto clean_up_allocators;
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}
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/*
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* Kernel VMA. Must always exist for an address space.
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*/
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snprintf(alloc_name, sizeof(alloc_name), "gk20a_%s-sys", name);
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err = __nvgpu_buddy_allocator_init(g, &vm->kernel,
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vm, alloc_name,
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kernel_vma_start,
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kernel_vma_limit - kernel_vma_start,
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SZ_4K,
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GPU_BALLOC_MAX_ORDER,
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kernel_vma_flags);
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if (err)
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goto clean_up_allocators;
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vm->mapped_buffers = NULL;
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nvgpu_mutex_init(&vm->update_gmmu_lock);
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kref_init(&vm->ref);
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nvgpu_init_list_node(&vm->vm_area_list);
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/*
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* This is only necessary for channel address spaces. The best way to
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* distinguish channel address spaces from other address spaces is by
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* size - if the address space is 4GB or less, it's not a channel.
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*/
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if (vm->va_limit > SZ_4G) {
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err = nvgpu_init_sema_pool(vm);
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if (err)
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goto clean_up_allocators;
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}
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return 0;
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clean_up_allocators:
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if (nvgpu_alloc_initialized(&vm->kernel))
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nvgpu_alloc_destroy(&vm->kernel);
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if (nvgpu_alloc_initialized(&vm->user))
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nvgpu_alloc_destroy(&vm->user);
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if (nvgpu_alloc_initialized(&vm->user_lp))
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nvgpu_alloc_destroy(&vm->user_lp);
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clean_up_page_tables:
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/* Cleans up nvgpu_vm_init_page_tables() */
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nvgpu_vfree(g, vm->pdb.entries);
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nvgpu_free_gmmu_pages(vm, &vm->pdb);
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clean_up_vgpu_vm:
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#ifdef CONFIG_TEGRA_GR_VIRTUALIZATION
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if (g->is_virtual)
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vgpu_vm_remove(vm);
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#endif
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return err;
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}
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/**
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* nvgpu_init_vm() - Initialize an address space.
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*
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* @mm - Parent MM.
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* @vm - The VM to init.
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* @big_page_size - Size of big pages associated with this VM.
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* @low_hole - The size of the low hole (unaddressable memory at the bottom of
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* the address space).
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* @kernel_reserved - Space reserved for kernel only allocations.
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* @aperture_size - Total size of the aperture.
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* @big_pages - If true then big pages are possible in the VM. Note this does
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* not guarantee that big pages will be possible.
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* @name - Name of the address space.
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*
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* This function initializes an address space according to the following map:
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*
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* +--+ 0x0
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* | |
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* +--+ @low_hole
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* | |
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* ~ ~ This is the "user" section.
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* | |
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* +--+ @aperture_size - @kernel_reserved
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* | |
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* ~ ~ This is the "kernel" section.
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* | |
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* +--+ @aperture_size
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*
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* The user section is therefor what ever is left over after the @low_hole and
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* @kernel_reserved memory have been portioned out. The @kernel_reserved is
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* always persent at the top of the memory space and the @low_hole is always at
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* the bottom.
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*
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* For certain address spaces a "user" section makes no sense (bar1, etc) so in
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* such cases the @kernel_reserved and @low_hole should sum to exactly
|
|
* @aperture_size.
|
|
*/
|
|
struct vm_gk20a *nvgpu_vm_init(struct gk20a *g,
|
|
u32 big_page_size,
|
|
u64 low_hole,
|
|
u64 kernel_reserved,
|
|
u64 aperture_size,
|
|
bool big_pages,
|
|
bool userspace_managed,
|
|
char *name)
|
|
{
|
|
struct vm_gk20a *vm = nvgpu_kzalloc(g, sizeof(*vm));
|
|
|
|
if (!vm)
|
|
return NULL;
|
|
|
|
if (__nvgpu_vm_init(&g->mm, vm, big_page_size, low_hole,
|
|
kernel_reserved, aperture_size, big_pages,
|
|
userspace_managed, name)) {
|
|
nvgpu_kfree(g, vm);
|
|
return NULL;
|
|
}
|
|
|
|
return vm;
|
|
}
|
|
|
|
/*
|
|
* Cleanup the VM!
|
|
*/
|
|
static void __nvgpu_vm_remove(struct vm_gk20a *vm)
|
|
{
|
|
struct nvgpu_mapped_buf *mapped_buffer;
|
|
struct nvgpu_vm_area *vm_area, *vm_area_tmp;
|
|
struct nvgpu_rbtree_node *node = NULL;
|
|
struct gk20a *g = vm->mm->g;
|
|
|
|
/*
|
|
* Do this outside of the update_gmmu_lock since unmapping the semaphore
|
|
* pool involves unmapping a GMMU mapping which means aquiring the
|
|
* update_gmmu_lock.
|
|
*/
|
|
if (!(g->gpu_characteristics.flags & NVGPU_GPU_FLAGS_HAS_SYNCPOINTS)) {
|
|
if (vm->sema_pool) {
|
|
nvgpu_semaphore_pool_unmap(vm->sema_pool, vm);
|
|
nvgpu_semaphore_pool_put(vm->sema_pool);
|
|
}
|
|
}
|
|
|
|
nvgpu_mutex_acquire(&vm->update_gmmu_lock);
|
|
|
|
nvgpu_rbtree_enum_start(0, &node, vm->mapped_buffers);
|
|
while (node) {
|
|
mapped_buffer = mapped_buffer_from_rbtree_node(node);
|
|
nvgpu_vm_unmap_locked(mapped_buffer, NULL);
|
|
nvgpu_rbtree_enum_start(0, &node, vm->mapped_buffers);
|
|
}
|
|
|
|
/* destroy remaining reserved memory areas */
|
|
nvgpu_list_for_each_entry_safe(vm_area, vm_area_tmp,
|
|
&vm->vm_area_list,
|
|
nvgpu_vm_area, vm_area_list) {
|
|
nvgpu_list_del(&vm_area->vm_area_list);
|
|
nvgpu_kfree(vm->mm->g, vm_area);
|
|
}
|
|
|
|
if (nvgpu_alloc_initialized(&vm->kernel))
|
|
nvgpu_alloc_destroy(&vm->kernel);
|
|
if (nvgpu_alloc_initialized(&vm->user))
|
|
nvgpu_alloc_destroy(&vm->user);
|
|
if (nvgpu_alloc_initialized(&vm->user_lp))
|
|
nvgpu_alloc_destroy(&vm->user_lp);
|
|
|
|
nvgpu_vm_free_entries(vm, &vm->pdb, 0);
|
|
|
|
#ifdef CONFIG_TEGRA_GR_VIRTUALIZATION
|
|
if (g->is_virtual)
|
|
vgpu_vm_remove(vm);
|
|
#endif
|
|
|
|
nvgpu_mutex_release(&vm->update_gmmu_lock);
|
|
|
|
nvgpu_kfree(g, vm);
|
|
}
|
|
|
|
static void __nvgpu_vm_remove_kref(struct kref *ref)
|
|
{
|
|
struct vm_gk20a *vm = container_of(ref, struct vm_gk20a, ref);
|
|
|
|
__nvgpu_vm_remove(vm);
|
|
}
|
|
|
|
void nvgpu_vm_get(struct vm_gk20a *vm)
|
|
{
|
|
kref_get(&vm->ref);
|
|
}
|
|
|
|
void nvgpu_vm_put(struct vm_gk20a *vm)
|
|
{
|
|
kref_put(&vm->ref, __nvgpu_vm_remove_kref);
|
|
}
|
|
|
|
int nvgpu_insert_mapped_buf(struct vm_gk20a *vm,
|
|
struct nvgpu_mapped_buf *mapped_buffer)
|
|
{
|
|
mapped_buffer->node.key_start = mapped_buffer->addr;
|
|
mapped_buffer->node.key_end = mapped_buffer->addr + mapped_buffer->size;
|
|
|
|
nvgpu_rbtree_insert(&mapped_buffer->node, &vm->mapped_buffers);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void nvgpu_remove_mapped_buf(struct vm_gk20a *vm,
|
|
struct nvgpu_mapped_buf *mapped_buffer)
|
|
{
|
|
nvgpu_rbtree_unlink(&mapped_buffer->node, &vm->mapped_buffers);
|
|
}
|
|
|
|
struct nvgpu_mapped_buf *__nvgpu_vm_find_mapped_buf(
|
|
struct vm_gk20a *vm, u64 addr)
|
|
{
|
|
struct nvgpu_rbtree_node *node = NULL;
|
|
struct nvgpu_rbtree_node *root = vm->mapped_buffers;
|
|
|
|
nvgpu_rbtree_search(addr, &node, root);
|
|
if (!node)
|
|
return NULL;
|
|
|
|
return mapped_buffer_from_rbtree_node(node);
|
|
}
|
|
|
|
struct nvgpu_mapped_buf *__nvgpu_vm_find_mapped_buf_range(
|
|
struct vm_gk20a *vm, u64 addr)
|
|
{
|
|
struct nvgpu_rbtree_node *node = NULL;
|
|
struct nvgpu_rbtree_node *root = vm->mapped_buffers;
|
|
|
|
nvgpu_rbtree_range_search(addr, &node, root);
|
|
if (!node)
|
|
return NULL;
|
|
|
|
return mapped_buffer_from_rbtree_node(node);
|
|
}
|
|
|
|
struct nvgpu_mapped_buf *__nvgpu_vm_find_mapped_buf_less_than(
|
|
struct vm_gk20a *vm, u64 addr)
|
|
{
|
|
struct nvgpu_rbtree_node *node = NULL;
|
|
struct nvgpu_rbtree_node *root = vm->mapped_buffers;
|
|
|
|
nvgpu_rbtree_less_than_search(addr, &node, root);
|
|
if (!node)
|
|
return NULL;
|
|
|
|
return mapped_buffer_from_rbtree_node(node);
|
|
}
|