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b4c355d32c
Update ACR BL desc & support for ACR boot. JIRA DNVGPU-10 Change-Id: Iced2e10695439b2e1b47835f5c3c8a5d274e4b1e Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1155027 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
43 lines
1.2 KiB
C
43 lines
1.2 KiB
C
/*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef __ACR_H_
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#define __ACR_H_
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#include "gm20b/mm_gm20b.h"
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#include "gm20b/acr_gm20b.h"
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#include "gm206/acr_gm206.h"
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struct acr_desc {
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struct mem_desc ucode_blob;
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struct bin_hdr *bl_bin_hdr;
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struct hsflcn_bl_desc *pmu_hsbl_desc;
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struct bin_hdr *hsbin_hdr;
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struct acr_fw_header *fw_hdr;
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u32 pmu_args;
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const struct firmware *acr_fw;
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struct flcn_acr_desc *acr_dmem_desc;
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struct mem_desc acr_ucode;
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const struct firmware *hsbl_fw;
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struct mem_desc hsbl_ucode;
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union {
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struct flcn_bl_dmem_desc bl_dmem_desc;
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struct flcn_bl_dmem_desc_v1 bl_dmem_desc_v1;
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};
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const struct firmware *pmu_fw;
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const struct firmware *pmu_desc;
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u32 capabilities;
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};
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#endif /*__ACR_H_*/
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