Files
linux-nvgpu/drivers/gpu/nvgpu/os/posix/nvgpu.c
Debarshi Dutta c1ea9e3955 gpu: nvgpu: correct usage for gk20a_busy_noresume
Background: In case of a deferred suspend implemented by gk20a_idle,
the device waits for a delay before suspending and invoking
power gating callbacks. This helps minimize resume latency for any
resume calls(gk20a_busy) that occur before the delay.

Now, some APIs spread across the driver requires that if the device
is powered on, then they can proceed with register writes, but if its
powered off, then it must return. Examples of such APIs include
l2_flush, fb_flush and even nvs_thread. We have relied on
some hacks to ensure the device is kept powered on to prevent any such
delayed suspension to proceed. However, this still raced for some calls
like ioctl l2_flush, so gk20a_busy() was added (Refer to commit Id
dd341e7ecbaf65843cb8059f9d57a8be58952f63)

Upstream linux kernel has introduced the API pm_runtime_get_if_active
specifically to handle the corner case for locking the state during the
event of a deferred suspend.

According to the Linux kernel docs, invoking the API with
ign_usage_count parameter set to true, prevents an incoming suspend
if it has not already suspended.

With this, there is no longer a need to check whether
nvgpu_is_powered_off(). Changed the behavior of gk20a_busy_noresume()
to return bool. It returns true, iff it managed to prevent
an imminent suspend, else returns false. For cases where
PM runtime is disabled, the code follows the existing implementation.

Added missing gk20a_busy_noresume() calls to tlb_invalidate.

Also, moved gk20a_pm_deinit to after nvgpu_quiesce() in
the module removal path. This is done to prevent regs access
after registers are locked out at the end of nvgpu_quiesce. This
can happen as some free function calls post quiesce  might still
have l2_flush, fb_flush deep inside their stack, hence invoke
gk20a_pm_deinit to disable pm_runtime immediately after quiesce.

Kept the legacy implementation same for VGPU and
older kernels

Jira NVGPU-8487

Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Change-Id: I972f9afe577b670c44fc09e3177a5ce8a44ca338
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2715654
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-05-25 04:59:46 -07:00

286 lines
6.7 KiB
C

/*
* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include <unistd.h>
#include <stdlib.h>
#include <pthread.h>
#include <nvgpu/bug.h>
#include <nvgpu/types.h>
#include <nvgpu/atomic.h>
#include <nvgpu/nvgpu_common.h>
#include <nvgpu/nvgpu_init.h>
#include <nvgpu/hal_init.h>
#include <nvgpu/os_sched.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/enabled.h>
#include <nvgpu/errata.h>
#include <nvgpu/posix/probe.h>
#include <nvgpu/posix/mock-regs.h>
#include <nvgpu/posix/io.h>
#include "os_posix.h"
#ifdef NVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT
#include <nvgpu/posix/posix-fault-injection.h>
#endif
#ifdef NVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT
struct nvgpu_posix_fault_inj *nvgpu_nvgpu_get_fault_injection(void)
{
struct nvgpu_posix_fault_inj_container *c =
nvgpu_posix_fault_injection_get_container();
return &c->nvgpu_fi;
}
#endif
/*
* Write callback. Forward the write access to the mock IO framework.
*/
static void writel_access_reg_fn(struct gk20a *g,
struct nvgpu_reg_access *access)
{
nvgpu_posix_io_writel_reg_space(g, access->addr, access->value);
}
/*
* Read callback. Get the register value from the mock IO framework.
*/
static void readl_access_reg_fn(struct gk20a *g,
struct nvgpu_reg_access *access)
{
access->value = nvgpu_posix_io_readl_reg_space(g, access->addr);
}
static struct nvgpu_posix_io_callbacks default_posix_reg_callbacks = {
/* Write APIs all can use the same accessor. */
.writel = writel_access_reg_fn,
.writel_check = writel_access_reg_fn,
.bar1_writel = writel_access_reg_fn,
.usermode_writel = writel_access_reg_fn,
/* Likewise for the read APIs. */
.__readl = readl_access_reg_fn,
.readl = readl_access_reg_fn,
.bar1_readl = readl_access_reg_fn,
};
#ifdef CONFIG_NVGPU_NON_FUSA
/*
* Somewhat meaningless in userspace...
*/
void nvgpu_kernel_restart(void *cmd)
{
(void)cmd;
BUG();
}
#endif
void nvgpu_start_gpu_idle(struct gk20a *g)
{
nvgpu_set_enabled(g, NVGPU_DRIVER_IS_DYING, true);
}
int nvgpu_enable_irqs(struct gk20a *g)
{
(void)g;
return 0;
}
void nvgpu_disable_irqs(struct gk20a *g)
{
(void)g;
}
/*
* We have no runtime PM stuff in userspace so these are really just noops.
*/
bool gk20a_busy_noresume(struct gk20a *g)
{
if (nvgpu_is_powered_off(g)) {
return false;
} else {
return true;
}
}
void gk20a_idle_nosuspend(struct gk20a *g)
{
(void)g;
}
int gk20a_busy(struct gk20a *g)
{
#ifdef NVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT
if (nvgpu_posix_fault_injection_handle_call(
nvgpu_nvgpu_get_fault_injection())) {
return -ENODEV;
}
#endif
#ifdef CONFIG_NVGPU_NON_FUSA
nvgpu_atomic_inc(&g->usage_count);
#else
(void)g;
#endif
return 0;
}
void gk20a_idle(struct gk20a *g)
{
#ifdef CONFIG_NVGPU_NON_FUSA
nvgpu_atomic_dec(&g->usage_count);
#else
(void)g;
#endif
}
static void nvgpu_posix_load_regs(struct gk20a *g)
{
u32 i;
int err;
struct nvgpu_mock_iospace space;
struct nvgpu_posix_io_reg_space *regs;
for (i = 0; i < MOCK_REGS_LAST; i++) {
err = nvgpu_get_mock_reglist(g, i, &space);
if (err) {
nvgpu_err(g, "Unknown IO regspace: %d; ignoring.", i);
continue;
}
err = nvgpu_posix_io_add_reg_space(g, space.base, (u32)space.size);
nvgpu_assert(err == 0);
regs = nvgpu_posix_io_get_reg_space(g, space.base);
nvgpu_assert(regs != NULL);
if (space.data != NULL) {
memcpy(regs->data, space.data, space.size);
}
}
}
static __thread struct gk20a *g_saved;
struct gk20a *nvgpu_posix_current_device(void)
{
return g_saved;
}
/*
* This function aims to initialize enough stuff to make unit testing worth
* while. There are several interfaces and APIs that rely on the struct gk20a's
* state in order to function: logging, for example, but there are many other
* things, too.
*
* Initialize as much of that as possible here. This is meant to be equivalent
* to the kernel space driver's probe function.
*/
struct gk20a *nvgpu_posix_probe(void)
{
struct gk20a *g;
struct nvgpu_os_posix *p;
#ifdef NVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT
if (nvgpu_posix_fault_injection_handle_call(
nvgpu_nvgpu_get_fault_injection())) {
return NULL;
}
#endif
p = malloc(sizeof(*p));
if (p == NULL) {
return NULL;
}
(void) memset(p, 0, sizeof(*p));
g = &p->g;
g->log_mask = NVGPU_DEFAULT_DBG_MASK;
g->mm.g = g;
g_saved = g;
g->regs = NVGPU_POSIX_REG_BAR0 << NVGPU_POSIX_REG_SHIFT;
g->bar1 = NVGPU_POSIX_REG_BAR1 << NVGPU_POSIX_REG_SHIFT;
g->usermode_regs = NVGPU_POSIX_REG_USERMODE << NVGPU_POSIX_REG_SHIFT;
if (nvgpu_kmem_init(g) != 0) {
goto fail_kmem;
}
if (nvgpu_init_errata_flags(g) != 0) {
goto fail_errata_flags;
}
if (nvgpu_init_enabled_flags(g) != 0) {
goto fail_enabled_flags;
}
/*
* Initialize a bunch of gv11b register values.
*/
nvgpu_posix_io_init_reg_space(g);
nvgpu_posix_load_regs(g);
/*
* Set up some default register IO callbacks that basically all
* unit tests will be OK with. Unit tests that wish to override this
* may do so.
*
* This needs to happen before the nvgpu_detect_chip() call below
* otherise we bug out when trying to do a register read.
*/
(void)nvgpu_posix_register_io(g, &default_posix_reg_callbacks);
/*
* Detect chip based on the regs we filled above. Most unit tests
* will be fine with this; a few may have to undo a little bit of it
* in roder to fully test the nvgpu_detect_chip() function.
*/
nvgpu_assert(nvgpu_detect_chip(g) == 0);
return g;
fail_enabled_flags:
nvgpu_free_errata_flags(g);
fail_errata_flags:
nvgpu_kmem_fini(g, 0);
fail_kmem:
free(p);
return NULL;
}
void nvgpu_posix_cleanup(struct gk20a *g)
{
struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
nvgpu_kmem_fini(g, 0);
nvgpu_free_enabled_flags(g);
nvgpu_free_errata_flags(g);
free(p);
}