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c2b63150cd
Unify the initialization routines for the vGPU and regular GPU paths. This helps avoid any further code divergence. This also assumes that the code running on the regular GPU essentially works for the vGPU. The only addition is that the regular GPU path calls an API in the vGPU code that sends the necessary RM server message. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: I37af1993fd8b50f666ae27524d382cce49cf28f7 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1480226 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
161 lines
3.3 KiB
C
161 lines
3.3 KiB
C
/*
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* GK20A Address Spaces
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*
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* Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <trace/events/gk20a.h>
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#include <nvgpu/kmem.h>
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#include <nvgpu/vm.h>
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#include "gk20a/gk20a.h"
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#include "gk20a/platform_gk20a.h"
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/* dumb allocator... */
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static int generate_as_share_id(struct gk20a_as *as)
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{
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gk20a_dbg_fn("");
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return ++as->last_share_id;
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}
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/* still dumb */
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static void release_as_share_id(struct gk20a_as *as, int id)
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{
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gk20a_dbg_fn("");
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return;
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}
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/* address space interfaces for the gk20a module */
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static int gk20a_vm_alloc_share(struct gk20a_as_share *as_share,
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u32 big_page_size, u32 flags)
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{
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struct gk20a_as *as = as_share->as;
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struct gk20a *g = gk20a_from_as(as);
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struct mm_gk20a *mm = &g->mm;
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struct vm_gk20a *vm;
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char name[32];
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int err;
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const bool userspace_managed =
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(flags & NVGPU_GPU_IOCTL_ALLOC_AS_FLAGS_USERSPACE_MANAGED) != 0;
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gk20a_dbg_fn("");
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if (big_page_size == 0) {
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big_page_size =
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gk20a_get_platform(g->dev)->default_big_page_size;
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} else {
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if (!is_power_of_2(big_page_size))
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return -EINVAL;
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if (!(big_page_size & g->gpu_characteristics.available_big_page_sizes))
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return -EINVAL;
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}
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vm = nvgpu_kzalloc(g, sizeof(*vm));
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if (!vm)
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return -ENOMEM;
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as_share->vm = vm;
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vm->as_share = as_share;
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vm->enable_ctag = true;
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snprintf(name, sizeof(name), "as_%d", as_share->id);
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err = nvgpu_init_vm(mm, vm, big_page_size,
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big_page_size << 10,
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mm->channel.kernel_size,
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mm->channel.user_size + mm->channel.kernel_size,
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!mm->disable_bigpage, userspace_managed, name);
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return err;
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}
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int gk20a_as_alloc_share(struct gk20a *g,
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u32 big_page_size, u32 flags,
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struct gk20a_as_share **out)
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{
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struct gk20a_as_share *as_share;
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int err = 0;
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gk20a_dbg_fn("");
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g = gk20a_get(g);
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if (!g)
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return -ENODEV;
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*out = NULL;
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as_share = nvgpu_kzalloc(g, sizeof(*as_share));
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if (!as_share)
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return -ENOMEM;
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as_share->as = &g->as;
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as_share->id = generate_as_share_id(as_share->as);
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/* this will set as_share->vm. */
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err = gk20a_busy(g);
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if (err)
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goto failed;
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err = gk20a_vm_alloc_share(as_share, big_page_size, flags);
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gk20a_idle(g);
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if (err)
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goto failed;
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*out = as_share;
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return 0;
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failed:
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nvgpu_kfree(g, as_share);
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return err;
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}
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int gk20a_vm_release_share(struct gk20a_as_share *as_share)
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{
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struct vm_gk20a *vm = as_share->vm;
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gk20a_dbg_fn("");
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vm->as_share = NULL;
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as_share->vm = NULL;
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nvgpu_vm_put(vm);
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return 0;
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}
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/*
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* channels and the device nodes call this to release.
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* once the ref_cnt hits zero the share is deleted.
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*/
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int gk20a_as_release_share(struct gk20a_as_share *as_share)
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{
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struct gk20a *g = as_share->vm->mm->g;
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int err;
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gk20a_dbg_fn("");
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err = gk20a_busy(g);
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if (err)
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goto release_fail;
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err = gk20a_vm_release_share(as_share);
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gk20a_idle(g);
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release_fail:
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release_as_share_id(as_share->as, as_share->id);
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gk20a_put(g);
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nvgpu_kfree(g, as_share);
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return err;
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}
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