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ab5684ce1b
Make the APIs nvgpu_channel_sync_get_syncpt_id() and channel_sync_syncpt_get_id() return u32s rather than converting to ints and back. Also define FIFO_INVAL_SYNCPT_ID to use for invalid syncpt IDs rather than using magic numbers. JIRA NVGPU-1008 Change-Id: I4dde6b15fd3708fb0126b46c6fea8ac1b447c7ce Signed-off-by: Philip Elcan <pelcan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2014821 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
105 lines
3.2 KiB
C
105 lines
3.2 KiB
C
/*
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*
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* Nvgpu Channel Synchronization Abstraction (Syncpoints)
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*
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* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_CHANNEL_SYNC_SYNCPT_H
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#define NVGPU_CHANNEL_SYNC_SYNCPT_H
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#include <nvgpu/types.h>
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#include <nvgpu/nvgpu_mem.h>
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#include <nvgpu/channel_sync.h>
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struct channel_gk20a;
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struct nvgpu_channel_sync_syncpt;
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#ifdef CONFIG_TEGRA_GK20A_NVHOST
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/*
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* Returns the sync point id or negative number if no syncpt
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*/
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u32 nvgpu_channel_sync_get_syncpt_id(struct nvgpu_channel_sync_syncpt *s);
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/*
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* Returns the sync point address of sync point or 0 if not supported
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*/
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u64 nvgpu_channel_sync_get_syncpt_address(struct nvgpu_channel_sync_syncpt *s);
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/*
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* Generate a gpu wait cmdbuf from raw fence(can be syncpoints or semaphores).
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* Returns a gpu cmdbuf that performs the wait when executed.
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*/
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int nvgpu_channel_sync_wait_syncpt(struct nvgpu_channel_sync_syncpt *s,
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u32 id, u32 thresh, struct priv_cmd_entry *entry);
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/*
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* Converts a valid struct nvgpu_channel_sync ptr to
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* struct nvgpu_channel_sync_syncpt ptr else return NULL.
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*/
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struct nvgpu_channel_sync_syncpt * __must_check
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nvgpu_channel_sync_to_syncpt(struct nvgpu_channel_sync *sync);
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/*
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* Constructs a struct nvgpu_channel_sync_syncpt and returns a
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* pointer to the struct nvgpu_channel_sync associated with it.
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*/
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struct nvgpu_channel_sync *
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nvgpu_channel_sync_syncpt_create(struct channel_gk20a *c,
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bool user_managed);
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#else
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static inline u32 nvgpu_channel_sync_get_syncpt_id(
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struct nvgpu_channel_sync_syncpt *s)
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{
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return FIFO_INVAL_SYNCPT_ID;
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}
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static inline u64 nvgpu_channel_sync_get_syncpt_address(
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struct nvgpu_channel_sync_syncpt *s)
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{
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return 0ULL;
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}
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static inline int nvgpu_channel_sync_wait_syncpt(
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struct nvgpu_channel_sync_syncpt *s,
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u32 id, u32 thresh, struct priv_cmd_entry *entry)
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{
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return -EINVAL;
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}
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static inline struct nvgpu_channel_sync_syncpt * __must_check
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nvgpu_channel_sync_to_syncpt(struct nvgpu_channel_sync *sync)
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{
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return NULL;
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}
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static inline struct nvgpu_channel_sync *
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nvgpu_channel_sync_syncpt_create(struct channel_gk20a *c, bool user_managed)
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{
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return NULL;
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}
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#endif
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#endif /* NVGPU_CHANNEL_SYNC_SYNCPT_H */
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