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daf5475f50
To enable ecc interrupts early during nvgpu_finalize_poweron, ecc support has to be enabled early. ecc support was being initialized together for GR, LTC, PMU, FB units late in the poweron sequence. Move the ecc init for each unit to respective unit's init functions. And separate out the hal ecc functions from GR ecc unit to respective hal units. JIRA NVGPU-4336 Change-Id: I2c42fb6ba3192dece00be61411c64a56ce16740a Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2239153 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
48 lines
1.8 KiB
C
48 lines
1.8 KiB
C
/*
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* Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef LTC_GV11B_H
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#define LTC_GV11B_H
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#include <nvgpu/types.h>
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#include <nvgpu/nvgpu_err.h>
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struct gk20a;
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struct nvgpu_hw_err_inject_info;
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struct nvgpu_hw_err_inject_info_desc;
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void gv11b_ltc_init_fs_state(struct gk20a *g);
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int gv11b_lts_ecc_init(struct gk20a *g);
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#ifdef CONFIG_NVGPU_GRAPHICS
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void gv11b_ltc_set_zbc_stencil_entry(struct gk20a *g,
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u32 stencil_depth,
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u32 index);
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#endif /* CONFIG_NVGPU_GRAPHICS */
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#ifdef CONFIG_NVGPU_INJECT_HWERR
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struct nvgpu_hw_err_inject_info_desc * gv11b_ltc_get_err_desc(struct gk20a *g);
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void gv11b_ltc_inject_ecc_error(struct gk20a *g,
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struct nvgpu_hw_err_inject_info *err, u32 error_info);
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#endif
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#endif
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