Mahantesh Kumbar 863b470644 gpu: nvgpu: PMU init sequence change ...

-Moved PMU RTOS init & start RTOS from acr_gm20b.c file pmu.c
 method nvgpu_init_pmu_support()
-Modified nvgpu_init_pmu_support() to init required interface
 for PMU RTOS & does start PMU RTOS in secure & non-secure
 based on NVGPU_SEC_PRIVSECURITY flag.
-Created secured_pmu_start ops under PMU ops to start PMU
 falcon in low secure mode.
-Updated PMU ops update_lspmu_cmdline_args, setup_apertures &
 secured_pmu_start assignment for gp106 & gv100 to support
 modified PMU init sequence.
-Removed duplicate PMU non-secure bootstrap code from multiple
 files & defined gm20b_ns_pmu_setup_hw_and_bootstrap()method
 to handle non secure PMU bootstrap, reused this method
 for need chips.

JIRA NVGPU-1146

Change-Id: I3957da2936b3c4ea0c985e67802c847c38de7c89
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1818099
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2018-09-24 08:12:03 -07:00

..

pmu_debug.c

gpu: nvgpu: invoke calls to methods in pmu_gk20a.h via HAL

2018-08-29 17:46:51 -07:00

pmu_fw.c

gpu:nvgpu: PMU cleanup for ACR

2018-09-24 08:11:44 -07:00

pmu_ipc.c

gpu: nvgpu: fix race condition in pmu_rpc_handler

2018-09-20 10:51:40 -07:00

pmu_perfmon.c

nvgpu: common: MISRA 10.1 boolean fixes

2018-09-19 03:24:12 -07:00

pmu_pg.c

nvgpu: common: MISRA 10.1 boolean fixes

2018-09-19 03:24:12 -07:00

pmu.c

gpu: nvgpu: PMU init sequence change

2018-09-24 08:12:03 -07:00