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c4bb19d46e
JIRA DNVGPU-143 The arbiter is charged with selecting the proper frequencies when multiple applications submit simultaneously clock change requests On the current implementation, the arbiter guarantees that the selected frequency will be always higher or equal to the request, as long as the request is in range. The current code is not yet realtime friendly, as requests are not pre-allocated. Summary of changes: (1) pstate/vf switch no longer selects boot frequency (2) changed mclk code change to accept input freq (3) added arbiter (4) now a single session can submit concurrent requests the last request is the one that applies for that session (5) modified locking mechanism to reduce lock contention (6) Added callback to notify the arbiter that the VF table has changed and is no longer valid (PMU/Thermals must call this when VF table is invalid) (7) changed internal API to work with MHz (8) added debugfs for stats Change-Id: I6a7b05c9447761e8536f84ef86b5ab0793164d63 Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1239461 Reviewed-by: Thomas Fleury <tfleury@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1267120 Reviewed-by: Automatic_Commit_Validation_User
54 lines
1.2 KiB
C
54 lines
1.2 KiB
C
/*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef _CLKMCLK_H_
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#define _CLKMCLK_H_
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#include <linux/mutex.h>
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enum gk20a_mclk_speed {
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gk20a_mclk_low_speed,
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gk20a_mclk_mid_speed,
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gk20a_mclk_high_speed,
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};
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#define MCLK_LOW_SPEED_LIMIT 405
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#define MCLK_MID_SPEED_LIMIT 810
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#define MCLK_HIGH_SPEED_LIMIT 3003
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#define DEFAULT_BOOT_MCLK_SPEED MCLK_HIGH_SPEED_LIMIT
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struct clk_mclk_state {
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enum gk20a_mclk_speed speed;
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struct mutex mclk_mutex;
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void *vreg_buf;
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bool init;
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/* function pointers */
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int (*change)(struct gk20a *g, u16 val);
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#ifdef CONFIG_DEBUG_FS
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s64 switch_max;
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s64 switch_min;
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u64 switch_num;
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s64 switch_avg;
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s64 switch_std;
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bool debugfs_set;
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#endif
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};
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int clk_mclkseq_init_mclk_gddr5(struct gk20a *g);
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int clk_mclkseq_change_mclk_gddr5(struct gk20a *g, u16 val);
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#endif
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