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Description: nvgpu_clk_pmupstate is the global structure in clk units. It is declared in clk.h and all clk units will include clk.h header. nvgpu_clk_pmupstate struct will have structure pointers to all clk units and will include genereic function pointers which are used by most clk units. The reason why the function pointers is defined in this sturct, and not included inside g->ops is because, these are only clk specific functions and rest of the driver code is not dependent on this. Each unit will have init function to allocate memory for its structure and will initialize its local functions. Changes: 1) Introduced nvgpu_clk_pmupstate in clk.h file. All the changes needed to call the above struct from individual clk units. 2) Removed cyclic dependency headers in clk units by calling function through pointers defined in clk.h. 3) Initialization of each unit is done in respective unit instead of doing it in clk unit. Added *_init_pmupstate and *_free_pmupstate to individual clk units. 4) Each unit clean up will be done separately while refactoring that unit. NVGPU-1963 NVGPU-2965 Change-Id: Iee79d7a812b62407252636057b104f952c94a229 Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2033537 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
103 lines
2.9 KiB
C
103 lines
2.9 KiB
C
/*
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* Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_CLK_DOMAIN_H
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#define NVGPU_CLK_DOMAIN_H
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#include <nvgpu/pmuif/ctrlboardobj.h>
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#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
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#include <nvgpu/pmu/clk/clk_domain.h>
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#define CLK_DOMAIN_BOARDOBJGRP_VERSION 0x30
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#define CLK_DOMAIN_BOARDOBJGRP_VERSION_35 0x35
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#define CLK_TABLE_HAL_ENTRY_GP 0x02
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#define CLK_TABLE_HAL_ENTRY_GV 0x03
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struct nvgpu_clk_domains;
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struct nvgpu_clk_domain;
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typedef int clkgetslaveclk(struct gk20a *g, struct nvgpu_clk_pmupstate *pclk,
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struct nvgpu_clk_domain *pdomain, u16 *clkmhz,
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u16 masterclkmhz);
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struct clk_domain_3x {
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struct nvgpu_clk_domain super;
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bool b_noise_aware_capable;
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};
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struct clk_domain_3x_fixed {
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struct clk_domain_3x super;
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u16 freq_mhz;
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};
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struct clk_domain_3x_prog {
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struct clk_domain_3x super;
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u8 clk_prog_idx_first;
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u8 clk_prog_idx_last;
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bool b_force_noise_unaware_ordering;
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struct ctrl_clk_freq_delta factory_delta;
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short freq_delta_min_mhz;
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short freq_delta_max_mhz;
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struct ctrl_clk_clk_delta deltas;
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u8 noise_unaware_ordering_index;
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u8 noise_aware_ordering_index;
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};
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struct clk_domain_35_prog {
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struct clk_domain_3x_prog super;
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u8 pre_volt_ordering_index;
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u8 post_volt_ordering_index;
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u8 clk_pos;
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u8 clk_vf_curve_count;
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};
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struct clk_domain_3x_master {
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struct clk_domain_3x_prog super;
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u32 slave_idxs_mask;
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};
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struct clk_domain_35_master {
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struct clk_domain_35_prog super;
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struct clk_domain_3x_master master;
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struct boardobjgrpmask_e32 master_slave_domains_grp_mask;
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};
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struct clk_domain_3x_slave {
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struct clk_domain_3x_prog super;
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u8 master_idx;
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clkgetslaveclk *clkdomainclkgetslaveclk;
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};
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struct clk_domain_30_slave {
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u8 rsvd;
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u8 master_idx;
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clkgetslaveclk *clkdomainclkgetslaveclk;
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};
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struct clk_domain_35_slave {
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struct clk_domain_35_prog super;
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struct clk_domain_30_slave slave;
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};
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#endif /* NVGPU_CLK_DOMAIN_H */
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