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905f1c0392
* Parsing of shadow registers from VBIOS * Partial devinit engine interpreter implementation JIRA DNVGPU-117 Change-Id: I42179748889f17d674ad0a986e81c418b3b8df11 Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1214956 Reviewed-on: http://git-master/r/1237293 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
49 lines
1.1 KiB
C
49 lines
1.1 KiB
C
/*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef _CLKMCLK_H_
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#define _CLKMCLK_H_
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#include <linux/mutex.h>
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enum gk20a_mclk_speed {
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gk20a_mclk_low_speed,
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gk20a_mclk_mid_speed,
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gk20a_mclk_high_speed,
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};
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struct clk_mclk_state {
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enum gk20a_mclk_speed speed;
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struct mutex mclk_mutex;
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void *vreg_buf;
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bool init;
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/* function pointers */
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int (*change)(struct gk20a *g, enum gk20a_mclk_speed speed);
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#ifdef CONFIG_DEBUG_FS
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s64 switch_max;
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s64 switch_min;
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u64 switch_num;
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s64 switch_avg;
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s64 switch_std;
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bool debugfs_set;
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#endif
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};
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int clk_mclkseq_init_mclk_gddr5(struct gk20a *g);
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int clk_mclkseq_change_mclk_gddr5(struct gk20a *g,
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enum gk20a_mclk_speed speed);
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#endif
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