Files
linux-nvgpu/drivers/gpu/nvgpu/common/vgpu/fifo/channel_vgpu.h
Richard Zhao c8d6a91de6 gpu: nvgpu: update .channel.enable/disable to use runlist_id and chid
Moving to use IDs rather than struct makes it reusable on server side.

Jira GVSCI-15770

Change-Id: Ibd94ab8c9f0492bd6d20243525905d637eb8de66
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2863438
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-03-13 04:56:04 -07:00

42 lines
1.9 KiB
C

/*
* Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_CHANNEL_VGPU_H
#define NVGPU_CHANNEL_VGPU_H
struct gk20a;
struct nvgpu_channel;
void vgpu_channel_bind(struct nvgpu_channel *ch);
void vgpu_channel_unbind(struct nvgpu_channel *ch);
int vgpu_channel_alloc_inst(struct gk20a *g, struct nvgpu_channel *ch);
void vgpu_channel_free_inst(struct gk20a *g, struct nvgpu_channel *ch);
void vgpu_channel_enable(struct gk20a *g, u32 runlist_id, u32 chid);
void vgpu_channel_disable(struct gk20a *g, u32 runlist_id, u32 chid);
u32 vgpu_channel_count(struct gk20a *g);
void vgpu_channel_set_ctx_mmu_error(struct gk20a *g, struct nvgpu_channel *ch);
void vgpu_channel_set_error_notifier(struct gk20a *g,
struct tegra_vgpu_channel_set_error_notifier *p);
void vgpu_channel_abort_cleanup(struct gk20a *g, u32 chid);
#endif