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git://nv-tegra.nvidia.com/linux-nvgpu.git
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e81a36e56a
It's preparing to add bellow CFLAGS:
-Werror -Wall -Wextra \
-Wmissing-braces -Wpointer-arith -Wundef \
-Wconversion -Wsign-conversion \
-Wformat-security \
-Wmissing-declarations -Wredundant-decls -Wimplicit-fallthrough
Jira GVSCI-11640
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: Ia16ef186da1e97badff9dd0bf8cbd6700dd77b15
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2555057
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-by: Aparna Das <aparnad@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
67 lines
2.2 KiB
C
67 lines
2.2 KiB
C
/*
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* GV11B master
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*
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* Copyright (c) 2016-2022, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/types.h>
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#include <nvgpu/io.h>
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#include <nvgpu/mc.h>
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#include <nvgpu/cic_mon.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/engines.h>
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#include "mc_gv11b.h"
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#include <nvgpu/hw/gv11b/hw_mc_gv11b.h>
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bool gv11b_mc_is_intr_hub_pending(struct gk20a *g, u32 mc_intr_0)
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{
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(void)g;
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return ((mc_intr_0 & mc_intr_hub_pending_f()) != 0U);
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}
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bool gv11b_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 engine_id,
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u32 *eng_intr_pending)
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{
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u32 mc_intr_0 = nvgpu_readl(g, mc_intr_r(NVGPU_CIC_INTR_STALLING));
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u32 stall_intr, eng_intr_mask;
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eng_intr_mask = nvgpu_engine_act_interrupt_mask(g, engine_id);
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*eng_intr_pending = mc_intr_0 & eng_intr_mask;
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stall_intr = mc_intr_pfifo_pending_f() |
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mc_intr_hub_pending_f() |
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mc_intr_priv_ring_pending_f() |
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mc_intr_ltc_pending_f();
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nvgpu_log(g, gpu_dbg_info | gpu_dbg_intr,
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"mc_intr_0 = 0x%08x, eng_intr = 0x%08x",
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mc_intr_0 & stall_intr, *eng_intr_pending);
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return (mc_intr_0 & (eng_intr_mask | stall_intr)) != 0U;
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}
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bool gv11b_mc_is_mmu_fault_pending(struct gk20a *g)
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{
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return g->ops.fb.intr.is_mmu_fault_pending(g);
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}
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