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19186c8a02
Add api to translate dmabuf's fmode_t to gk20a_mem_rw_flag for read only/read write mapping selection. By default dmabuf fd mapping permission should be a maximum access permission associated to a particual dmabuf fd. Remove bit flag MAP_ACCESS_NO_WRITE and add 2 bit values for user access requests NVGPU_VM_MAP_ACCESS_DEFAULT|READ_ONLY| READ_WRITE. To unify map access type handling in Linux and QNX move the parameter NVGPU_VM_MAP_ACCESS_* check to common function nvgpu_vm_map. Set MAP_ACCESS_TYPE enabled flag in common characteristics init function as it is supported for Linux and QNX. Bug 200717195 Bug 3250920 Change-Id: I1a249f7c52bda099390dd4f371b005e1a7cef62f Signed-off-by: Lakshmanan M <lm@nvidia.com> Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2507150 Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
99 lines
2.7 KiB
C
99 lines
2.7 KiB
C
/*
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* Copyright (c) 2017-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __COMMON_LINUX_VM_PRIV_H__
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#define __COMMON_LINUX_VM_PRIV_H__
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#include <nvgpu/types.h>
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#include <asm/cacheflush.h>
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/*
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* Couple of places explicitly flush caches still. Any DMA buffer we allocate
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* from within the GPU is writecombine and as a result does not need this but
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* there seem to be exceptions.
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*/
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#ifdef CONFIG_ARM64
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#define outer_flush_range(a, b)
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#define __cpuc_flush_dcache_area __flush_dcache_area
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#endif
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struct sg_table;
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struct dma_buf;
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struct device;
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struct vm_gk20a;
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struct vm_gk20a_mapping_batch;
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struct nvgpu_vm_area;
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enum gk20a_mem_rw_flag;
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struct nvgpu_os_buffer {
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struct dma_buf *dmabuf;
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struct dma_buf_attachment *attachment;
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struct device *dev;
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};
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struct nvgpu_mapped_buf_priv {
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struct dma_buf *dmabuf;
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struct dma_buf_attachment *attachment;
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struct sg_table *sgt;
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};
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/* NVGPU_AS_MAP_BUFFER_FLAGS_DIRECT_KIND_CTRL must be set */
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int nvgpu_vm_map_linux(struct vm_gk20a *vm,
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struct dma_buf *dmabuf,
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u64 map_addr,
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u32 map_access_requested,
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u32 flags,
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u32 page_size,
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s16 compr_kind,
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s16 incompr_kind,
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u64 buffer_offset,
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u64 mapping_size,
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struct vm_gk20a_mapping_batch *mapping_batch,
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u64 *gpu_va);
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/*
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* Notes:
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* - Batch may be NULL if map op is not part of a batch.
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* - NVGPU_AS_MAP_BUFFER_FLAGS_DIRECT_KIND_CTRL must be set
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*/
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int nvgpu_vm_map_buffer(struct vm_gk20a *vm,
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int dmabuf_fd,
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u64 *map_addr,
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u32 flags, /* NVGPU_AS_MAP_BUFFER_FLAGS_ */
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u32 page_size,
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s16 compr_kind,
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s16 incompr_kind,
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u64 buffer_offset,
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u64 mapping_size,
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struct vm_gk20a_mapping_batch *batch);
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/* find buffer corresponding to va */
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int nvgpu_vm_find_buf(struct vm_gk20a *vm, u64 gpu_va,
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struct dma_buf **dmabuf,
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u64 *offset);
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/* modify existing mapping attributes (i.e. kind) */
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int nvgpu_vm_mapping_modify(struct vm_gk20a *vm,
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s16 compr_kind, s16 incompr_kind,
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u64 map_address, u64 buffer_offset, u64 buffer_size);
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enum nvgpu_aperture gk20a_dmabuf_aperture(struct gk20a *g,
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struct dma_buf *dmabuf);
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#endif
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