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9a0e041602
Fix MISRA errors in hal/mm/gmmu/gmmu_gp10b_fusa.c Rule 10.6 forbids assignment of u32 expression to u64 target. This patch fixes this rule by casting the expression to u64. Rule 20.6 doesn't allow use of preprocessor directives within a macro. To resolve this patch moves the preprocessor directive before the macro function call. Jira NVGPU-3806 Change-Id: Ib7ddf746c801be62d3dd90a6ab7e27c690a60dc6 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2152065 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>