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git://nv-tegra.nvidia.com/linux-nvgpu.git
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bd8b866758
- delete vgpu_is_reduced_bar1(). Current implementation maps only that portion of BAR1 that is reserved for guest in case of reduced BAR1. However this code is obsolete and reduced BAR1 check is always false. Delete related function vgpu_is_reduced_bar1() and conditional mapping. - move vgpu_mm_bar1_map_userd() delcaration from vgpu.h to mm_vgpu.h - move vgpu_gp10b_init_hal() and vgpu_gv11b_init_hal() declarations from vgpu.h to new header files vgpu/gp10b/vgpu_hal_gp10b.h and vgpu/gv11b/vgpu_hal_gv11b.h respectively. Jira GVSCI-334 Change-Id: I11a297a0aba1afd8b0ad022169ba7f734bcd952c Signed-off-by: Aparna Das <aparnad@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2081152 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
69 lines
2.4 KiB
C
69 lines
2.4 KiB
C
/*
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* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_MM_VGPU_H
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#define NVGPU_MM_VGPU_H
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struct nvgpu_mem;
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struct channel_gk20a;
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struct vm_gk20a_mapping_batch;
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struct gk20a_as_share;
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struct vm_gk20a;
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enum gk20a_mem_rw_flag;
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struct nvgpu_sgt;
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enum nvgpu_aperture;
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void vgpu_locked_gmmu_unmap(struct vm_gk20a *vm,
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u64 vaddr,
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u64 size,
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u32 pgsz_idx,
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bool va_allocated,
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enum gk20a_mem_rw_flag rw_flag,
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bool sparse,
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struct vm_gk20a_mapping_batch *batch);
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int vgpu_vm_bind_channel(struct vm_gk20a *vm,
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struct channel_gk20a *ch);
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int vgpu_mm_fb_flush(struct gk20a *g);
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void vgpu_mm_l2_invalidate(struct gk20a *g);
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int vgpu_mm_l2_flush(struct gk20a *g, bool invalidate);
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int vgpu_mm_tlb_invalidate(struct gk20a *g, struct nvgpu_mem *pdb);
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void vgpu_mm_mmu_set_debug_mode(struct gk20a *g, bool enable);
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u64 vgpu_locked_gmmu_map(struct vm_gk20a *vm,
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u64 map_offset,
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struct nvgpu_sgt *sgt,
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u64 buffer_offset,
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u64 size,
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u32 pgsz_idx,
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u8 kind_v,
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u32 ctag_offset,
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u32 flags,
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enum gk20a_mem_rw_flag rw_flag,
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bool clear_ctags,
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bool sparse,
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bool priv,
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struct vm_gk20a_mapping_batch *batch,
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enum nvgpu_aperture aperture);
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int vgpu_init_mm_support(struct gk20a *g);
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u64 vgpu_mm_bar1_map_userd(struct gk20a *g, struct nvgpu_mem *mem, u32 offset);
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#endif /* NVGPU_MM_VGPU_H */
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