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ce5c43d24a
fifo_pbdma_isr is moved to fifo_intr_gk20a HAL unit and renamed to gk20a_fifo_pbdma_isr. The pbdma specific handling part of the function gk20a_fifo_handle_pbdma_intr is now separated into a top level HAL function named handle_pbdma_intr. This HAL function is implemented for GM20B and all the other architectures use the same implementation. handle_pbdma_intr can accept NULL values for the parameters handled and error_notifier. gk20a_fifo_handle_pbdma_intr is called from gv11b_fifo_poll_pbdma_chan_status and gk20a_fifo_pbdma_isr. The call to gk20a_fifo_handle_pbdma_intr from gv11b_fifo_poll_pbdma_chan_status doesn't progress to recovery. Thus, the function gk20a_fifo_handle_pbdma_intr is removed to decouple pbdma handling from recovery. gv11b_fifo_poll_pbdma_chan_status now directly calls the HAL handle_pbdma_intr. For gk20a_fifo_pbdma_isr, rc_type is used to proceed to recovery by calling gk20a_fifo_pbdma_fault_rc. gk20a_fifo_pbdma_fault_rc is changed to public from static. Jira NVGPU-2950 Change-Id: I4f3597aca2317d4b745cd47bab9dd95c927160a9 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2073535 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
41 lines
1.7 KiB
C
41 lines
1.7 KiB
C
/*
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* Copyright (c) 2011-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_FIFO_INTR_GK20A_H
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#define NVGPU_FIFO_INTR_GK20A_H
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#include <nvgpu/types.h>
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struct gk20a;
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void gk20a_fifo_intr_0_enable(struct gk20a *g, bool enable);
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void gk20a_fifo_intr_1_enable(struct gk20a *g, bool enable);
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void gk20a_fifo_intr_0_isr(struct gk20a *g);
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u32 gk20a_fifo_intr_1_isr(struct gk20a *g);
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void gk20a_fifo_intr_handle_chsw_error(struct gk20a *g);
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void gk20a_fifo_intr_handle_runlist_event(struct gk20a *g);
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u32 gk20a_fifo_pbdma_isr(struct gk20a *g);
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bool gk20a_fifo_handle_sched_error(struct gk20a *g);
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#endif /* NVGPU_FIFO_INTR_GK20A_H */
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