mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-24 02:22:34 +03:00
35e9663bd0
Moved init/deinit eng method buffers from fifo to tsg - tsg.init_eng_method_buffers - tsg.deinit_eng_method_buffers Moved gv11b_fifo_init_ramfc_eng_method_buffer to the following tsg HAL: - tsg.bind_channel_eng_method_buffers This HAL is now called during bind_channel. Added the following ramin HAL: - ramin.set_ramfc_eng_method_buffer Jira NVGPU-2979 Change-Id: I96f6ff15d2176d4e3714fa8fe65a9126b3fff82c Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2087185 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
42 lines
1.7 KiB
C
42 lines
1.7 KiB
C
/*
|
|
* Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
|
|
*
|
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
* copy of this software and associated documentation files (the "Software"),
|
|
* to deal in the Software without restriction, including without limitation
|
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
* and/or sell copies of the Software, and to permit persons to whom the
|
|
* Software is furnished to do so, subject to the following conditions:
|
|
*
|
|
* The above copyright notice and this permission notice shall be included in
|
|
* all copies or substantial portions of the Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
|
* DEALINGS IN THE SOFTWARE.
|
|
*/
|
|
|
|
#ifndef NVGPU_TSG_GV11B_H
|
|
#define NVGPU_TSG_GV11B_H
|
|
|
|
struct tsg_gk20a;
|
|
struct channel_gk20a;
|
|
struct nvgpu_channel_hw_state;
|
|
|
|
void gv11b_tsg_enable(struct tsg_gk20a *tsg);
|
|
void gv11b_tsg_unbind_channel_check_eng_faulted(struct tsg_gk20a *tsg,
|
|
struct channel_gk20a *ch,
|
|
struct nvgpu_channel_hw_state *hw_state);
|
|
void gv11b_tsg_init_eng_method_buffers(struct gk20a *g,
|
|
struct tsg_gk20a *tsg);
|
|
void gv11b_tsg_deinit_eng_method_buffers(struct gk20a *g,
|
|
struct tsg_gk20a *tsg);
|
|
void gv11b_tsg_bind_channel_eng_method_buffers(struct tsg_gk20a *tsg,
|
|
struct channel_gk20a *ch);
|
|
|
|
#endif /* NVGPU_TSG_GV11B_H */
|