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23d6b36101
Support exporting and importing semaphore-based synchronization with the stable dma-fence API. The "Android" sync fence API used until now is deprecated. The Android sync framework is still kept as the default. Jira NVGPU-5353 Change-Id: I9e57947adeb4d2ef5d59135ed7d008553c44f97c Signed-off-by: Konsta Hölttä <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2336119 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
86 lines
2.1 KiB
C
86 lines
2.1 KiB
C
/*
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* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <nvgpu/types.h>
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#include <nvgpu/os_fence.h>
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#include <nvgpu/linux/os_fence_dma.h>
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#include <nvgpu/channel.h>
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#include <nvgpu/nvhost.h>
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#include <linux/dma-fence.h>
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#include <linux/sync_file.h>
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#include <linux/file.h>
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inline struct dma_fence *nvgpu_get_dma_fence(struct nvgpu_os_fence *s)
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{
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struct dma_fence *fence = (struct dma_fence *)s->priv;
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return fence;
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}
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static void nvgpu_os_fence_clear(struct nvgpu_os_fence *fence_out)
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{
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fence_out->priv = NULL;
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fence_out->g = NULL;
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fence_out->ops = NULL;
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}
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void nvgpu_os_fence_init(struct nvgpu_os_fence *fence_out,
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struct gk20a *g, const struct nvgpu_os_fence_ops *fops,
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struct dma_fence *fence)
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{
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fence_out->g = g;
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fence_out->ops = fops;
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fence_out->priv = (void *)fence;
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}
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void nvgpu_os_fence_dma_drop_ref(struct nvgpu_os_fence *s)
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{
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struct dma_fence *fence = nvgpu_get_dma_fence(s);
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dma_fence_put(fence);
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nvgpu_os_fence_clear(s);
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}
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void nvgpu_os_fence_dma_install_fd(struct nvgpu_os_fence *s, int fd)
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{
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struct dma_fence *fence = nvgpu_get_dma_fence(s);
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struct sync_file *file = sync_file_create(fence);
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fd_install(fd, file->file);
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}
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int nvgpu_os_fence_fdget(struct nvgpu_os_fence *fence_out,
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struct nvgpu_channel *c, int fd)
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{
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int err = -ENOSYS;
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#ifdef CONFIG_TEGRA_GK20A_NVHOST
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if (nvgpu_has_syncpoints(c->g)) {
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err = nvgpu_os_fence_syncpt_fdget(fence_out, c, fd);
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}
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#endif
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if (err) {
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err = nvgpu_os_fence_sema_fdget(fence_out, c, fd);
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}
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if (err) {
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nvgpu_err(c->g, "error obtaining fence from fd %d", fd);
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}
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return err;
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}
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