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nvgpu_mc_log_pending_intrs is debugging related function hence compile out that and related functionality under CONFIG_NVGPU_NON_FUSA. nvgpu_mc_intr_enable is applicable for older chips hence compile out under CONFIG_NVGPU_NON_FUSA and CONFIG_NVGPU_HAL_NON_FUSA. Update BUS, CE, ECC, FIFO, MC, PRIV_RING, GR, LTC, FB, PMU units' doxygen comments based on recent ECC and MC refactoring. JIRA NVGPU-4439 Change-Id: I337318683d6311b9c2b5748f2fb07dff29a6584f Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2252853 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>