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84ddb23633
Moving to use IDs rather than struct makes it reusable on server side. Jira GVSCI-15770 Change-Id: Id4e815e9cf78a43156449d0e77e8e331fc906725 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2863439 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
45 lines
1.9 KiB
C
45 lines
1.9 KiB
C
/*
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* Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef FIFO_CHANNEL_GA10B_H
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#define FIFO_CHANNEL_GA10B_H
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#include <nvgpu/types.h>
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struct gk20a;
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struct nvgpu_channel;
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struct nvgpu_channel_hw_state;
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u32 ga10b_channel_count(struct gk20a *g);
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void ga10b_channel_enable(struct gk20a *g, u32 runlist_id, u32 chid);
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void ga10b_channel_disable(struct gk20a *g, u32 runlist_id, u32 chid);
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void ga10b_channel_bind(struct nvgpu_channel *ch);
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void ga10b_channel_unbind(struct nvgpu_channel *ch);
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void ga10b_channel_clear(struct gk20a *g, u32 runlist_id, u32 chid);
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void ga10b_channel_read_state(struct gk20a *g, u32 runlist_id, u32 chid,
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struct nvgpu_channel_hw_state *state);
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void ga10b_channel_reset_faulted(struct gk20a *g, struct nvgpu_channel *ch,
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bool eng, bool pbdma);
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void ga10b_channel_force_ctx_reload(struct gk20a *g, u32 runlist_id, u32 chid);
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#endif /* FIFO_CHANNEL_GA10B_H */
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