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d90c5ed371
Add more detailed documentation for the fifo api in fifo.h as per the new guidelines. Add documentation for related fifo hals. Jira NVGPU-6997 Change-Id: Ibad7b0567dddfb780cf9e3cb053ea4ffc248fdf6 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2588419 (cherry picked from commit id 736ad1b4249a22955d41564d298757e6d60f21ac) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2614743 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: Seema Khowala <seemaj@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
61 lines
2.2 KiB
C
61 lines
2.2 KiB
C
/*
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* GV11B Fifo
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*
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* Copyright (c) 2016-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_FIFO_GV11B_H
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#define NVGPU_FIFO_GV11B_H
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#include <nvgpu/types.h>
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/**
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* @file
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*
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* FIFO HAL GV11B.
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*/
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struct gk20a;
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int gv11b_init_fifo_reset_enable_hw(struct gk20a *g);
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/**
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* @brief Update userd configuration and read FIFO chip settings.
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*
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* @param g [in] The GPU driver struct.
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* - The function does not perform g parameter validation.
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*
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* Get fifo pointer from GPU pointer as g->fifo.
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* Set maximum number of VEIDs supported by chip in #nvgpu_fifo.max_subctx_count
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* using \ref gops_gr_init.get_max_subctx_count
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* "gops_gr_init.get_max_subctx_count()".
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* Set fifo_userd_writeback_timer_f() of register fifo_userd_writeback_r() to
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* fifo_userd_writeback_timer_100us_v().
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*
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* For gv11b, this function is mapped to \ref gops_fifo.init_fifo_setup_hw
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* "gops_fifo.init_fifo_setup_hw(g)".
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*
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* @retval 0 in case of success.
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*/
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int gv11b_init_fifo_setup_hw(struct gk20a *g);
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u32 gv11b_fifo_mmu_fault_id_to_pbdma_id(struct gk20a *g, u32 mmu_fault_id);
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#endif /* NVGPU_FIFO_GV11B_H */
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