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5f6ff29aea
Add reporting for the number of syncpoints when mapping the RO shim. This allows the userspace to perform boundary condition checks when computing the GPU VA for a syncpoint. JIRA GCSS-1579 Change-Id: Ia6c9eee917d2c1e08f9905701e03f2b09e01ba60 Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2533981 Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Lakshmanan M <lm@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
79 lines
2.6 KiB
C
79 lines
2.6 KiB
C
/*
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* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_SYNC_SYNCPT_CMDBUF_GV11B_H
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#define NVGPU_SYNC_SYNCPT_CMDBUF_GV11B_H
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#include <nvgpu/types.h>
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#include <nvgpu/errno.h>
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struct gk20a;
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struct priv_cmd_entry;
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struct nvgpu_mem;
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struct nvgpu_channel;
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struct vm_gk20a;
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#ifdef CONFIG_TEGRA_GK20A_NVHOST
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#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
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void gv11b_syncpt_add_wait_cmd(struct gk20a *g,
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struct priv_cmd_entry *cmd,
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u32 id, u32 thresh, u64 gpu_va_base);
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u32 gv11b_syncpt_get_wait_cmd_size(void);
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u32 gv11b_syncpt_get_incr_per_release(void);
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void gv11b_syncpt_add_incr_cmd(struct gk20a *g,
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struct priv_cmd_entry *cmd,
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u32 id, u64 gpu_va, bool wfi);
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u32 gv11b_syncpt_get_incr_cmd_size(bool wfi_cmd);
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#endif /* CONFIG_NVGPU_KERNEL_MODE_SUBMIT */
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void gv11b_syncpt_free_buf(struct nvgpu_channel *c,
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struct nvgpu_mem *syncpt_buf);
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int gv11b_syncpt_alloc_buf(struct nvgpu_channel *c,
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u32 syncpt_id, struct nvgpu_mem *syncpt_buf);
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int gv11b_syncpt_get_sync_ro_map(struct vm_gk20a *vm,
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u64 *base_gpuva, u32 *sync_size, u32 *num_syncpoints);
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#else
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static inline void gv11b_syncpt_free_buf(struct nvgpu_channel *c,
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struct nvgpu_mem *syncpt_buf)
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{
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}
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static inline int gv11b_syncpt_alloc_buf(struct nvgpu_channel *c,
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u32 syncpt_id, struct nvgpu_mem *syncpt_buf)
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{
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return -EINVAL;
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}
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static inline int gv11b_syncpt_get_sync_ro_map(struct vm_gk20a *vm,
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u64 *base_gpuva, u32 *sync_size)
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{
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return -EINVAL;
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}
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#endif /* CONFIG_TEGRA_GK20A_NVHOST */
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#endif /* NVGPU_SYNC_SYNCPT_CMDBUF_GV11B_H */
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