mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
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64 lines
2.0 KiB
C
64 lines
2.0 KiB
C
/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/types.h>
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#include <nvgpu/dma.h>
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#include <nvgpu/gk20a.h>
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#include "acr_wpr.h"
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#include "acr_priv.h"
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#include "acr_blob_alloc.h"
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int nvgpu_acr_alloc_blob_space_sys(struct gk20a *g, size_t size,
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struct nvgpu_mem *mem)
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{
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return nvgpu_dma_alloc_flags_sys(g, NVGPU_DMA_PHYSICALLY_ADDRESSED,
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size, mem);
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}
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#ifdef CONFIG_NVGPU_DGPU
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int nvgpu_acr_alloc_blob_space_vid(struct gk20a *g, size_t size,
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struct nvgpu_mem *mem)
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{
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struct wpr_carveout_info wpr_inf;
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int err;
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if (mem->size != 0ULL) {
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return 0;
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}
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g->acr->get_wpr_info(g, &wpr_inf);
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/*
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* Even though this mem_desc wouldn't be used, the wpr region needs to
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* be reserved in the allocator.
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*/
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err = nvgpu_dma_alloc_vid_at(g, wpr_inf.size,
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&g->acr->wpr_dummy, wpr_inf.wpr_base);
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if (err != 0) {
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return err;
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}
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return nvgpu_dma_alloc_vid_at(g, wpr_inf.size, mem,
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wpr_inf.nonwpr_base);
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}
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#endif
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