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git://nv-tegra.nvidia.com/linux-nvgpu.git
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44 lines
1.7 KiB
C
44 lines
1.7 KiB
C
/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/gk20a.h>
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#include <nvgpu/types.h>
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#include <nvgpu/dma.h>
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#include "acr_wpr.h"
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/* Both size and address of WPR need to be 128K-aligned */
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#define DGPU_WPR_SIZE 0x200000U
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void nvgpu_acr_wpr_info_sys(struct gk20a *g, struct wpr_carveout_info *inf)
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{
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g->ops.fb.read_wpr_info(g, &inf->wpr_base, &inf->size);
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}
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#ifdef CONFIG_NVGPU_DGPU
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void nvgpu_acr_wpr_info_vid(struct gk20a *g, struct wpr_carveout_info *inf)
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{
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inf->wpr_base = g->mm.vidmem.bootstrap_base;
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inf->nonwpr_base = inf->wpr_base + DGPU_WPR_SIZE;
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inf->size = DGPU_WPR_SIZE;
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}
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#endif
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