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0601fd25a5
The following changes implements the initial (as per bringup) nvlink driver. (1) SW initialization of nvlink core driver structures (2) Nvlink interrupt handling (3) Device initialization (IOCTRL, pll and clocks, device level intr) (4) Falcon support for minion (5) Minion load and bootstrapping (6) Link initialization and DL PROD settings (7) Device Interface init (and switching HSHUB to nvlink) (8) HS set/get mode for both link and sublink (9) Topology discovery and VBIOS settings. (10) Ensures we get physical contiguous memory when Nvlink is enabled This driver includes a hack for the current single dev/single link limitation. JIRA: EVLR-2331 JIRA: EVLR-2330 JIRA: EVLR-2329 JIRA: EVLR-2328 Change-Id: Idca9a819179376cc655784482b24b575a52fa9e5 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1656790 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
61 lines
3.2 KiB
C
61 lines
3.2 KiB
C
/*
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* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_NVLINK_GV100_H
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#define NVGPU_NVLINK_GV100_H
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struct gk20a;
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#define MINION_REG_RD32(g, off) gk20a_readl(g, g->nvlink.minion_base + (off))
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#define MINION_REG_WR32(g, off, v) gk20a_writel(g, g->nvlink.minion_base + (off), (v))
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#define IOCTRL_REG_RD32(g, off) gk20a_readl(g, g->nvlink.ioctrl_base + (off))
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#define IOCTRL_REG_WR32(g, off, v) gk20a_writel(g, g->nvlink.ioctrl_base + (off), (v));
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#define MIF_REG_RD32(g, id, off) gk20a_readl(g, g->nvlink.links[(id)].mif_base + (off))
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#define MIF_REG_WR32(g, id, off, v) gk20a_writel(g, g->nvlink.links[(id)].mif_base + (off), (v))
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#define IPT_REG_RD32(g, off) gk20a_readl(g, g->nvlink.ipt_base + (off))
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#define IPT_REG_WR32(g, off, v) gk20a_writel(g, g->nvlink.ipt_base + (off), (v))
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#define TLC_REG_RD32(g, id, off) gk20a_readl(g, g->nvlink.links[(id)].tl_base + (off))
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#define TLC_REG_WR32(g, id, off, v) gk20a_writel(g, g->nvlink.links[(id)].tl_base + (off), (v))
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#define DLPL_REG_RD32(g, id, off) gk20a_readl(g, g->nvlink.links[(id)].dlpl_base + (off))
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#define DLPL_REG_WR32(g, id, off, v) gk20a_writel(g, g->nvlink.links[(id)].dlpl_base + (off), (v))
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int gv100_nvlink_discover_ioctrl(struct gk20a *g);
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int gv100_nvlink_discover_link(struct gk20a *g);
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int gv100_nvlink_init(struct gk20a *g);
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int gv100_nvlink_isr(struct gk20a *g);
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/* API */
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int gv100_nvlink_link_early_init(struct gk20a *g, unsigned long mask);
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u32 gv100_nvlink_link_get_mode(struct gk20a *g, u32 link_id);
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u32 gv100_nvlink_link_get_state(struct gk20a *g, u32 link_id);
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int gv100_nvlink_link_set_mode(struct gk20a *g, u32 link_id, u32 mode);
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u32 gv100_nvlink_link_get_sublink_mode(struct gk20a *g, u32 link_id,
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bool is_rx_sublink);
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u32 gv100_nvlink_link_get_tx_sublink_state(struct gk20a *g, u32 link_id);
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u32 gv100_nvlink_link_get_rx_sublink_state(struct gk20a *g, u32 link_id);
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int gv100_nvlink_link_set_sublink_mode(struct gk20a *g, u32 link_id,
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bool is_rx_sublink, u32 mode);
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int gv100_nvlink_interface_init(struct gk20a *g);
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int gv100_nvlink_reg_init(struct gk20a *g);
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int gv100_nvlink_shutdown(struct gk20a *g);
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int gv100_nvlink_early_init(struct gk20a *g);
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#endif
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