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663e941eb6
- Updated "struct nv_pmu_boardobj, nv_pmu_boardobj_query & nv_pmu_boardobjgrp_super" by adding new members as per gv10x PMU ucode boardobj interface. - Created "PMU_QUEUE_COUNT_FOR_V5 4" for gv10x PMU ucode - Created "PMU_QUEUE_MSG_IDX_FOR_V5 3" for gv10x PMU ucode - Deleted unused "PMU_QUEUE_MSG_IDX_FOR_4" - Updating "APP_VERSION_GV10X 23616379" for ucode git CL: https://git-master.nvidia.com/r/#/c/1662993/ P4 CL#: 23647491 - Updating "APP_VERSION_GP10X 22099494" for ucode git CL: https://git-master.nvidia.com/r/#/c/1662995/ P4 CL#: 23647537 Change-Id: I6e8e2b30e81422f8b529a2fad6d926f93bd73d3e Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1656643 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
235 lines
7.8 KiB
C
235 lines
7.8 KiB
C
/*
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* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _GPMUIFBOARDOBJ_H_
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#define _GPMUIFBOARDOBJ_H_
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#include <nvgpu/flcnif_cmn.h>
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#include "ctrl/ctrlboardobj.h"
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/* board object group command id's. */
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#define NV_PMU_BOARDOBJGRP_CMD_SET 0x00
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#define NV_PMU_BOARDOBJGRP_CMD_GET_STATUS 0x01
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#define NV_PMU_RPC_ID_CLK_BOARD_OBJ_GRP_CMD 0x00
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#define NV_PMU_RPC_ID_FAN_BOARD_OBJ_GRP_CMD 0x00
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#define NV_PMU_RPC_ID_PERF_BOARD_OBJ_GRP_CMD 0x00
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#define NV_PMU_RPC_ID_PERF_CF_BOARD_OBJ_GRP_CMD 0x00
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#define NV_PMU_RPC_ID_PMGR_BOARD_OBJ_GRP_CMD 0x00
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#define NV_PMU_RPC_ID_THERM_BOARD_OBJ_GRP_CMD 0x00
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#define NV_PMU_RPC_ID_VOLT_BOARD_OBJ_GRP_CMD 0x00
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/*
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* Base structure describing a BOARDOBJ for communication between Kernel and
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* PMU.
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*/
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struct nv_pmu_boardobj {
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u8 type;
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u8 grp_idx;
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};
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/*
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* Base structure describing a BOARDOBJ for Query interface between Kernel and
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* PMU.
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*/
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struct nv_pmu_boardobj_query {
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u8 type;
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u8 grp_idx;
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};
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/*
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* Virtual base structure describing a BOARDOBJGRP interface between Kernel and
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* PMU.
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*/
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struct nv_pmu_boardobjgrp_super {
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u8 type;
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u8 class_id;
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u8 obj_slots;
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u8 flags;
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};
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struct nv_pmu_boardobjgrp {
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struct nv_pmu_boardobjgrp_super super;
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u32 obj_mask;
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};
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struct nv_pmu_boardobjgrp_e32 {
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struct nv_pmu_boardobjgrp_super super;
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struct ctrl_boardobjgrp_mask_e32 obj_mask;
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};
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struct nv_pmu_boardobjgrp_e255 {
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struct nv_pmu_boardobjgrp_super super;
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struct ctrl_boardobjgrp_mask_e255 obj_mask;
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};
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struct nv_pmu_boardobj_cmd_grp_payload {
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struct pmu_allocation_v3 dmem_buf;
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struct flcn_mem_desc_v0 fb;
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u8 hdr_size;
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u8 entry_size;
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};
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struct nv_pmu_boardobj_cmd_grp {
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u8 cmd_type;
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u8 pad[2];
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u8 class_id;
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struct nv_pmu_boardobj_cmd_grp_payload grp;
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};
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#define NV_PMU_BOARDOBJ_GRP_ALLOC_OFFSET \
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(NV_OFFSETOF(NV_PMU_BOARDOBJ_CMD_GRP, grp))
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struct nv_pmu_boardobj_cmd {
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union {
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u8 cmd_type;
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struct nv_pmu_boardobj_cmd_grp grp;
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struct nv_pmu_boardobj_cmd_grp grp_set;
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struct nv_pmu_boardobj_cmd_grp grp_get_status;
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};
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};
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struct nv_pmu_boardobj_msg_grp {
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u8 msg_type;
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bool b_success;
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flcn_status flcn_status;
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u8 class_id;
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};
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struct nv_pmu_boardobj_msg {
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union {
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u8 msg_type;
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struct nv_pmu_boardobj_msg_grp grp;
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struct nv_pmu_boardobj_msg_grp grp_set;
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struct nv_pmu_boardobj_msg_grp grp_get_status;
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};
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};
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/*
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* Macro generating structures describing classes which implement
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* NV_PMU_BOARDOBJGRP via the NV_PMU_BOARDBOBJ_CMD_GRP SET interface.
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*
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* @para _eng Name of implementing engine in which this structure is
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* found.
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* @param _class Class ID of Objects within Board Object Group.
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* @param _slots Max number of elements this group can contain.
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*/
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#define NV_PMU_BOARDOBJ_GRP_SET_MAKE(_eng, _class, _slots) \
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NV_PMU_MAKE_ALIGNED_STRUCT( \
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nv_pmu_##_eng##_##_class##_boardobjgrp_set_header, one_structure); \
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NV_PMU_MAKE_ALIGNED_UNION( \
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nv_pmu_##_eng##_##_class##_boardobj_set_union, one_union); \
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struct nv_pmu_##_eng##_##_class##_boardobj_grp_set { \
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union nv_pmu_##_eng##_##_class##_boardobjgrp_set_header_aligned hdr; \
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union nv_pmu_##_eng##_##_class##_boardobj_set_union_aligned objects[(_slots)];\
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}
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/*
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* Macro generating structures describing classes which implement
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* NV_PMU_BOARDOBJGRP_E32 via the NV_PMU_BOARDBOBJ_CMD_GRP SET interface.
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*
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* @para _eng Name of implementing engine in which this structure is
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* found.
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* @param _class Class ID of Objects within Board Object Group.
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*/
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#define NV_PMU_BOARDOBJ_GRP_SET_MAKE_E32(_eng, _class) \
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NV_PMU_BOARDOBJ_GRP_SET_MAKE(_eng, _class, \
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CTRL_BOARDOBJGRP_E32_MAX_OBJECTS)
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/*
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* Macro generating structures describing classes which implement
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* NV_PMU_BOARDOBJGRP_E255 via the NV_PMU_BOARDBOBJ_CMD_GRP SET interface.
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*
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* @para _eng Name of implementing engine in which this structure is
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* found.
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* @param _class Class ID of Objects within Board Object Group.
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*/
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#define NV_PMU_BOARDOBJ_GRP_SET_MAKE_E255(_eng, _class) \
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NV_PMU_BOARDOBJ_GRP_SET_MAKE(_eng, _class, \
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CTRL_BOARDOBJGRP_E255_MAX_OBJECTS)
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/*
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* Macro generating structures for querying dynamic state for classes which
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* implement NV_PMU_BOARDOBJGRP via the NV_PMU_BOARDOBJ_CMD_GRP GET_STATUS
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* interface.
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*
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* @para _eng Name of implementing engine in which this structure is
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* found.
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* @param _class Class ID of Objects within Board Object Group.
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* @param _slots Max number of elements this group can contain.
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*/
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#define NV_PMU_BOARDOBJ_GRP_GET_STATUS_MAKE(_eng, _class, _slots) \
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NV_PMU_MAKE_ALIGNED_STRUCT( \
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nv_pmu_##_eng##_##_class##_boardobjgrp_get_status_header, struct); \
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NV_PMU_MAKE_ALIGNED_UNION( \
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nv_pmu_##_eng##_##_class##_boardobj_get_status_union, union); \
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struct nv_pmu_##_eng##_##_class##_boardobj_grp_get_status { \
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union nv_pmu_##_eng##_##_class##_boardobjgrp_get_status_header_aligned \
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hdr; \
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union nv_pmu_##_eng##_##_class##_boardobj_get_status_union_aligned \
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objects[(_slots)]; \
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}
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/*
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* Macro generating structures for querying dynamic state for classes which
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* implement NV_PMU_BOARDOBJGRP_E32 via the NV_PMU_BOARDOBJ_CMD_GRP GET_STATUS
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* interface.
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*
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* @para _eng Name of implementing engine in which this structure is
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* found.
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* @param _class Class ID of Objects within Board Object Group.
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*/
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#define NV_PMU_BOARDOBJ_GRP_GET_STATUS_MAKE_E32(_eng, _class) \
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NV_PMU_BOARDOBJ_GRP_GET_STATUS_MAKE(_eng, _class, \
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CTRL_BOARDOBJGRP_E32_MAX_OBJECTS)
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/*
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* Macro generating structures for querying dynamic state for classes which
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* implement NV_PMU_BOARDOBJGRP_E255 via the NV_PMU_BOARDOBJ_CMD_GRP GET_STATUS
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* interface.
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*
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* @para _eng Name of implementing engine in which this structure is
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* found.
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* @param _class Class ID of Objects within Board Object Group.
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*/
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#define NV_PMU_BOARDOBJ_GRP_GET_STATUS_MAKE_E255(_eng, _class) \
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NV_PMU_BOARDOBJ_GRP_GET_STATUS_MAKE(_eng, _class, \
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CTRL_BOARDOBJGRP_E255_MAX_OBJECTS)
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/* RPC */
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/*
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* structure that holds data used to
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* execute BOARD_OBJ_GRP_CMD RPC.
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*/
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struct nv_pmu_rpc_struct_board_obj_grp_cmd
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{
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/* [IN/OUT] Must be first field in RPC structure */
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struct nv_pmu_rpc_header hdr;
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/* [IN] BOARDOBJGRP class IDs. */
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u8 class_id;
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/* [IN] Requested command ID (@ref NV_PMU_BOARDOBJGRP_CMD_***)*/
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u8 command_id;
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u32 scratch[1];
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};
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#endif /* _GPMUIFBOARDOBJ_H_ */
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