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ac8afda036
Add support gr_prepare for sw and hw. Add needed registers using nvgpu_posix_io_add_reg_space calls. Add unit tests covering following functions nvgpu_gr_prepare_sw nvgpu_gr_enable_hw Copy the falcon ucode binaries under userspace/firmware directory install-unit.sh modified to copy the firmware binaries under nvgpu-unnit/firmware directory Jira NVGPU-3582 Change-Id: If2131d2c48e828251208da86688b0594e62de82e Signed-off-by: vinodg <vinodg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2184293 Reviewed-by: Deepak Nibade <dnibade@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
84 lines
2.7 KiB
Makefile
84 lines
2.7 KiB
Makefile
# -*- mode: makefile -*-
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#
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# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a
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# copy of this software and associated documentation files (the "Software"),
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# to deal in the Software without restriction, including without limitation
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# the rights to use, copy, modify, merge, publish, distribute, sublicense,
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# and/or sell copies of the Software, and to permit persons to whom the
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# Software is furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in
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# all copies or substantial portions of the Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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# DEALINGS IN THE SOFTWARE.
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include $(NVGPU_SRC)/Makefile.sources
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OBJS := $(srcs:%.c=$(NVGPU_OUT)/%.o)
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HEADERS := \
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$(NVGPU_SRC)/include/nvgpu/*.h \
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$(NVGPU_SRC)/include/nvgpu/hw/*/*.h
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CORE_OBJS := \
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$(CORE_OUT)/unit_main.o \
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$(CORE_OUT)/nvgpu.o \
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$(CORE_OUT)/args.o \
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$(CORE_OUT)/io.o \
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$(CORE_OUT)/module.o \
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$(CORE_OUT)/results.o \
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$(CORE_OUT)/exec.o
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CORE_HEADERS := \
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$(CORE_SRC)/../include/unit/*.h
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# Each directory under the UNIT_SRC directory should correspond to one module.
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UNITS := \
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$(UNIT_SRC)/posix/env \
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$(UNIT_SRC)/posix/bitops \
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$(UNIT_SRC)/posix/mockio \
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$(UNIT_SRC)/posix/fault-injection \
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$(UNIT_SRC)/posix/bug \
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$(UNIT_SRC)/pramin \
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$(UNIT_SRC)/init \
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$(UNIT_SRC)/interface/bsearch \
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$(UNIT_SRC)/interface/lock \
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$(UNIT_SRC)/interface/atomic \
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$(UNIT_SRC)/interface/rbtree \
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$(UNIT_SRC)/mm/nvgpu_sgt \
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$(UNIT_SRC)/mm/allocators/buddy_allocator \
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$(UNIT_SRC)/mm/allocators/nvgpu_allocator \
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$(UNIT_SRC)/mm/allocators/bitmap_allocator \
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$(UNIT_SRC)/mm/allocators/page_allocator \
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$(UNIT_SRC)/mm/dma \
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$(UNIT_SRC)/mm/gmmu/pd_cache \
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$(UNIT_SRC)/mm/gmmu/page_table \
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$(UNIT_SRC)/mm/mm \
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$(UNIT_SRC)/mm/page_table_faults \
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$(UNIT_SRC)/mm/nvgpu_mem \
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$(UNIT_SRC)/mm/vm \
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$(UNIT_SRC)/fifo \
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$(UNIT_SRC)/fifo/channel \
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$(UNIT_SRC)/fifo/runlist \
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$(UNIT_SRC)/fifo/tsg \
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$(UNIT_SRC)/list \
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$(UNIT_SRC)/enabled \
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$(UNIT_SRC)/falcon \
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$(UNIT_SRC)/falcon/falcon_tests \
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$(UNIT_SRC)/pmu \
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$(UNIT_SRC)/gr \
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$(UNIT_SRC)/gr/config \
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$(UNIT_SRC)/gr/init
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ifeq ($(CONFIG_NVGPU_HAL_NON_FUSA),1)
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UNITS += $(UNIT_SRC)/fuse
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endif
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