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edb1166613
Rename get_physical_addr_bits and related functions to something that more clearly conveys what they are doing. The basic idea of these functions is to translate from a physical GPU address to a IOMMU GPU address. To do that a particular bit (that varies from chip to chip) is added to the physical address. JIRA NVGPU-68 Change-Id: I536cc595c4397aad69a24f740bc74db03f52bc0a Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1542966 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
43 lines
1.7 KiB
C
43 lines
1.7 KiB
C
/*
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* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef MM_GP10B_H
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#define MM_GP10B_H
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struct gk20a;
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struct gk20a_mmu_level;
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struct nvgpu_mem;
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struct vm_gk20a;
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u32 gp10b_mm_get_default_big_page_size(void);
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u32 gp10b_mm_get_iommu_bit(struct gk20a *g);
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int gp10b_init_mm_setup_hw(struct gk20a *g);
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int gb10b_init_bar2_vm(struct gk20a *g);
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int gb10b_init_bar2_mm_hw_setup(struct gk20a *g);
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const struct gk20a_mmu_level *gp10b_mm_get_mmu_levels(struct gk20a *g,
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u32 big_page_size);
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void gp10b_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block,
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struct vm_gk20a *vm);
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void gp10b_remove_bar2_vm(struct gk20a *g);
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#endif
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