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d8058743d7
Move graphics related defs and functions under CONFIG_NVGPU_GRAPHICS switch. Move classes not supported in GV11B under CONFIG_NVGPU_NON_FUSA switch. Add missing valid class numbers to gpu_class.is_valid HAL. Also remove un-used class defs from class.h header. Lot of qnx safety tests are still using graphics 3d class. Until those tests got fixed, allowing 3d graphics class as valid class for safety build. JIRA NVGPU-4301 Change-Id: Ifd2a13bee3210821799c2bca10e7245eb3c79121 Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Signed-off-by: Tejal Kudav <tkudav@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2224658 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
77 lines
2.0 KiB
C
77 lines
2.0 KiB
C
/*
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* Copyright (c) 2019 NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/class.h>
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#include <nvgpu/barrier.h>
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#include "class_gm20b.h"
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#include "class_gp10b.h"
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bool gp10b_class_is_valid(u32 class_num)
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{
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bool valid;
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nvgpu_speculation_barrier();
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switch (class_num) {
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case PASCAL_DMA_COPY_A:
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case PASCAL_CHANNEL_GPFIFO_A:
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valid = true;
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break;
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#ifdef CONFIG_NVGPU_GRAPHICS
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case PASCAL_A:
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valid = true;
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break;
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#endif
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#ifdef CONFIG_NVGPU_NON_FUSA
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case PASCAL_COMPUTE_A:
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valid = true;
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break;
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#endif
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default:
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valid = gm20b_class_is_valid(class_num);
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break;
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}
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return valid;
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}
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#ifdef CONFIG_NVGPU_GRAPHICS
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bool gp10b_class_is_valid_gfx(u32 class_num)
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{
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if (class_num == PASCAL_A || class_num == MAXWELL_B) {
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return true;
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} else {
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return false;
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}
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}
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#endif
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#ifdef CONFIG_NVGPU_NON_FUSA
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bool gp10b_class_is_valid_compute(u32 class_num)
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{
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if (class_num == PASCAL_COMPUTE_A || class_num == MAXWELL_COMPUTE_B) {
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return true;
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} else {
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return false;
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}
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}
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#endif
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