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d93e82dedb
Fix rule 8.6 misra violation in gr falcon code by enclosing following functions defs under CONFIG_NVGPU_GR_FALCON_NON_SECURE_BOOT switch. gm20b_gr_falcon_load_gpccs_dmem gm20b_gr_falcon_load_fecs_dmem gm20b_gr_falcon_load_gpccs_imem gm20b_gr_falcon_load_fecs_imem gm20b_gr_falcon_start_ucode gm20b_gr_falcon_fecs_host_int_enable JIRA NVGPU-3872 Change-Id: Iafebff3f9f0734f03758e1c951198545513d08d3 Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2174828 GVS: Gerrit_Virtual_Submit Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>