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da632aa173
Enable/disable LSPMU interrupt in MC, as required LSPMU interrupts are configured as part of LSPMU ucode init and don't need any additional PMU IRQ register to set/clear as part of GPU power-on/off sequence. Bug 3681561 Change-Id: Ifb47bc9cc83e16e46649b0eef5f257acb02f302c Signed-off-by: mkumbar <mkumbar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2740623 Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> GVS: Gerrit_Virtual_Submit