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5f8cfaa250
-Add start_conn, disconnect and overflow fault type priv error detection -For busy looping in interrupt context, use nvgpu_udelay() instead of nvgpu_usleep_range() Bug 200350539 Change-Id: I0d0da86d5688bca36817d445151818632c5ea4f1 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1569589 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
113 lines
3.9 KiB
C
113 lines
3.9 KiB
C
/*
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* GP10B priv ring
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*
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* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include "gk20a/gk20a.h"
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#include <nvgpu/log.h>
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#include <nvgpu/timers.h>
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#include <nvgpu/enabled.h>
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#include <nvgpu/hw/gp10b/hw_mc_gp10b.h>
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#include <nvgpu/hw/gp10b/hw_pri_ringmaster_gp10b.h>
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#include <nvgpu/hw/gp10b/hw_pri_ringstation_sys_gp10b.h>
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#include <nvgpu/hw/gp10b/hw_pri_ringstation_gpc_gp10b.h>
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void gp10b_priv_ring_isr(struct gk20a *g)
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{
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u32 status0, status1;
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u32 cmd;
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s32 retry = 100;
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u32 gpc;
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u32 gpc_stride, offset;
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if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) {
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nvgpu_info(g, "unhandled priv ring intr");
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return;
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}
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status0 = gk20a_readl(g, pri_ringmaster_intr_status0_r());
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status1 = gk20a_readl(g, pri_ringmaster_intr_status1_r());
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nvgpu_err(g, "ringmaster intr status0: 0x%08x,"
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"status1: 0x%08x", status0, status1);
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if (pri_ringmaster_intr_status0_ring_start_conn_fault_v(status0) != 0)
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nvgpu_err(g,
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"BUG: connectivity problem on the startup sequence");
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if (pri_ringmaster_intr_status0_disconnect_fault_v(status0) != 0)
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nvgpu_err(g, "ring disconnected");
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if (pri_ringmaster_intr_status0_overflow_fault_v(status0) != 0)
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nvgpu_err(g, "ring overflowed");
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if (pri_ringmaster_intr_status0_gbl_write_error_sys_v(status0) != 0) {
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nvgpu_err(g, "SYS write error. ADR %08x WRDAT %08x INFO %08x, CODE %08x",
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gk20a_readl(g, pri_ringstation_sys_priv_error_adr_r()),
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gk20a_readl(g, pri_ringstation_sys_priv_error_wrdat_r()),
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gk20a_readl(g, pri_ringstation_sys_priv_error_info_r()),
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gk20a_readl(g, pri_ringstation_sys_priv_error_code_r()));
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}
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if (status1) {
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gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_GPC_STRIDE);
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for (gpc = 0; gpc < g->gr.gpc_count; gpc++) {
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offset = gpc * gpc_stride;
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if (status1 & BIT(gpc)) {
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nvgpu_err(g, "GPC%u write error. ADR %08x "
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"WRDAT %08x INFO %08x, CODE %08x", gpc,
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gk20a_readl(g,
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pri_ringstation_gpc_gpc0_priv_error_adr_r() + offset),
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gk20a_readl(g,
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pri_ringstation_gpc_gpc0_priv_error_wrdat_r() + offset),
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gk20a_readl(g,
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pri_ringstation_gpc_gpc0_priv_error_info_r() + offset),
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gk20a_readl(g,
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pri_ringstation_gpc_gpc0_priv_error_code_r() + offset));
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status1 = status1 & (~(BIT(gpc)));
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if (!status1)
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break;
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}
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}
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}
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/* clear interrupt */
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cmd = gk20a_readl(g, pri_ringmaster_command_r());
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cmd = set_field(cmd, pri_ringmaster_command_cmd_m(),
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pri_ringmaster_command_cmd_ack_interrupt_f());
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gk20a_writel(g, pri_ringmaster_command_r(), cmd);
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/* poll for clear interrupt done */
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cmd = pri_ringmaster_command_cmd_v(
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gk20a_readl(g, pri_ringmaster_command_r()));
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while (cmd != pri_ringmaster_command_cmd_no_cmd_v() && retry) {
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nvgpu_udelay(20);
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cmd = pri_ringmaster_command_cmd_v(
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gk20a_readl(g, pri_ringmaster_command_r()));
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retry--;
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}
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if (retry == 0)
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nvgpu_err(g, "priv ringmaster intr ack failed");
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}
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