mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-22 17:36:20 +03:00
123 lines
3.3 KiB
C
123 lines
3.3 KiB
C
/*
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* CBC
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*
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* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/gk20a.h>
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#include <nvgpu/cbc.h>
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#include <nvgpu/dma.h>
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#include <nvgpu/log.h>
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#include <nvgpu/nvgpu_mem.h>
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#include <nvgpu/comptags.h>
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void nvgpu_cbc_remove_support(struct gk20a *g)
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{
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struct nvgpu_cbc *cbc = g->cbc;
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nvgpu_log_fn(g, " ");
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if (cbc == NULL) {
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return;
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}
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if (nvgpu_mem_is_valid(&cbc->compbit_store.mem)) {
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nvgpu_dma_free(g, &cbc->compbit_store.mem);
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(void) memset(&cbc->compbit_store, 0,
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sizeof(struct compbit_store_desc));
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}
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gk20a_comptag_allocator_destroy(g, &cbc->comp_tags);
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nvgpu_kfree(g, cbc);
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g->cbc = NULL;
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}
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/*
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* This function is triggered during finalize_poweron multiple times.
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* This function should not return if cbc is not NULL.
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* cbc.init(), which re-writes HW registers that are reset during suspend,
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* should be allowed to execute each time.
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*/
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int nvgpu_cbc_init_support(struct gk20a *g)
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{
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int err = 0;
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struct nvgpu_cbc *cbc = g->cbc;
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nvgpu_log_fn(g, " ");
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if (cbc == NULL) {
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cbc = nvgpu_kzalloc(g, sizeof(*cbc));
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if (cbc == NULL) {
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return -ENOMEM;
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}
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g->cbc = cbc;
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if (g->ops.cbc.alloc_comptags != NULL) {
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err = g->ops.cbc.alloc_comptags(g, g->cbc);
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if (err != 0) {
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nvgpu_err(g, "Failed to allocate comptags");
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nvgpu_kfree(g, cbc);
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g->cbc = NULL;
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return err;
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}
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}
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}
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if (g->ops.cbc.init != NULL) {
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g->ops.cbc.init(g, g->cbc);
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}
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return err;
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}
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int nvgpu_cbc_alloc(struct gk20a *g, size_t compbit_backing_size,
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bool vidmem_alloc)
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{
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struct nvgpu_cbc *cbc = g->cbc;
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if (nvgpu_mem_is_valid(&cbc->compbit_store.mem) != 0) {
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return 0;
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}
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#ifdef CONFIG_NVGPU_DGPU
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if (vidmem_alloc == true) {
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/*
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* Backing store MUST be physically contiguous and allocated in
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* one chunk
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* Vidmem allocation API does not support FORCE_CONTIGUOUS like
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* flag to allocate contiguous memory
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* But this allocation will happen in vidmem bootstrap allocator
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* which always allocates contiguous memory
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*/
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return nvgpu_dma_alloc_vid(g,
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compbit_backing_size,
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&cbc->compbit_store.mem);
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} else
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#endif
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{
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return nvgpu_dma_alloc_flags_sys(g,
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NVGPU_DMA_PHYSICALLY_ADDRESSED,
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compbit_backing_size,
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&cbc->compbit_store.mem);
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}
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}
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