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e05c0d13a0
Extract non-chip-specific code that manages the runlists (init, update, reschedule etc.) to a new file in the common directory. Move the declarations to a new matching runlist.h header. Jira NVGPU-1309 Change-Id: I3c7e0032899516487037f47ddc9a7e7aa4b0b33a Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1978058 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
58 lines
2.2 KiB
C
58 lines
2.2 KiB
C
/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_RUNLIST_H
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#define NVGPU_RUNLIST_H
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#include <nvgpu/types.h>
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struct gk20a;
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struct fifo_runlist_info_gk20a;
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struct tsg_gk20a;
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struct fifo_gk20a;
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struct channel_gk20a;
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#define RUNLIST_APPEND_FAILURE 0xffffffffU
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u32 nvgpu_runlist_construct_locked(struct fifo_gk20a *f,
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struct fifo_runlist_info_gk20a *runlist,
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u32 buf_id,
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u32 max_entries);
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int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id,
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u32 chid, bool add,
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bool wait_for_finish);
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int gk20a_fifo_reschedule_runlist(struct channel_gk20a *ch, bool preempt_next);
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int nvgpu_fifo_reschedule_runlist(struct channel_gk20a *ch, bool preempt_next,
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bool wait_preempt);
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int gk20a_fifo_update_runlist(struct gk20a *g, u32 runlist_id, u32 chid,
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bool add, bool wait_for_finish);
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int gk20a_fifo_update_runlist_ids(struct gk20a *g, u32 runlist_ids, u32 chid,
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bool add, bool wait_for_finish);
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const char *gk20a_fifo_interleave_level_name(u32 interleave_level);
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void gk20a_fifo_delete_runlist(struct fifo_gk20a *f);
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int nvgpu_init_runlist(struct gk20a *g, struct fifo_gk20a *f);
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#endif /* NVGPU_RUNLIST_H */
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