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MISRA Rule 21.6 requires that the standard library input/output functions shall not be used. Remove the usage of snprintf function to fix the violation. Cache name is not required in QNX build as it is not used in cache allocation. Jira NVGPU-3293 Change-Id: I2bd92a3ed2510a3ef8f2bdee8ad446b353baf613 Signed-off-by: ajesh <akv@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2144442 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Shashank Singh <shashsingh@nvidia.com> Reviewed-by: Ankur Kishore <ankkishore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
228 lines
5.2 KiB
C
228 lines
5.2 KiB
C
/*
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* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <stdlib.h>
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#include <nvgpu/bug.h>
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#include <nvgpu/kmem.h>
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#include <nvgpu/types.h>
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#include <nvgpu/atomic.h>
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#include <nvgpu/posix/kmem.h>
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#include <nvgpu/posix/sizes.h>
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#include <nvgpu/posix/bug.h>
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#ifdef NVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT
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#include <nvgpu/posix/posix-fault-injection.h>
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#endif
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struct nvgpu_kmem_cache {
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struct gk20a *g;
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size_t size;
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#ifdef __NVGPU_UNIT_TEST__
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char name[128];
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#endif
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};
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#ifdef __NVGPU_UNIT_TEST__
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static nvgpu_atomic_t kmem_cache_id;
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#endif
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#ifdef NVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT
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_Thread_local struct nvgpu_posix_fault_inj kmem_fi;
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struct nvgpu_posix_fault_inj *nvgpu_kmem_get_fault_injection(void)
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{
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return &kmem_fi;
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}
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#endif
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/*
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* kmem cache emulation: basically just do a regular malloc(). This is slower
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* but should not affect a user of kmem cache in the slightest bit.
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*/
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struct nvgpu_kmem_cache *nvgpu_kmem_cache_create(struct gk20a *g, size_t size)
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{
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struct nvgpu_kmem_cache *cache;
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#ifdef NVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT
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if (nvgpu_posix_fault_injection_handle_call(&kmem_fi)) {
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return NULL;
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}
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#endif
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cache = malloc(sizeof(struct nvgpu_kmem_cache));
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if (cache == NULL) {
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return NULL;
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}
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cache->g = g;
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cache->size = size;
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#ifdef __NVGPU_UNIT_TEST__
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(void)snprintf(cache->name, sizeof(cache->name),
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"nvgpu-cache-0x%p-%lu-%d", g, size,
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nvgpu_atomic_inc_return(&kmem_cache_id));
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#endif
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return cache;
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}
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void nvgpu_kmem_cache_destroy(struct nvgpu_kmem_cache *cache)
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{
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free(cache);
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}
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void *nvgpu_kmem_cache_alloc(struct nvgpu_kmem_cache *cache)
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{
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void *ptr;
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#ifdef NVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT
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if (nvgpu_posix_fault_injection_handle_call(&kmem_fi)) {
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return NULL;
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}
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#endif
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ptr = malloc(cache->size);
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if (ptr == NULL) {
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nvgpu_warn(NULL, "malloc returns NULL");
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return NULL;
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}
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return ptr;
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}
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void nvgpu_kmem_cache_free(struct nvgpu_kmem_cache *cache, void *ptr)
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{
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free(ptr);
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}
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void *nvgpu_kmalloc_impl(struct gk20a *g, size_t size, void *ip)
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{
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void *ptr;
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#ifdef NVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT
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if (nvgpu_posix_fault_injection_handle_call(&kmem_fi)) {
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return NULL;
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}
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#endif
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/*
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* Since, the callers don't really need the memory region to be
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* contiguous, use malloc here. If the need arises for this
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* interface to return contiguous memory, we can explore using
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* nvmap_page_alloc in qnx (i.e. using shm_open/shm_ctl_special/mmap
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* calls).
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*/
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ptr = malloc(size);
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if (ptr == NULL) {
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nvgpu_warn(NULL, "malloc returns NULL");
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return NULL;
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}
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return ptr;
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}
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void *nvgpu_kzalloc_impl(struct gk20a *g, size_t size, void *ip)
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{
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void *ptr;
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#ifdef NVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT
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if (nvgpu_posix_fault_injection_handle_call(&kmem_fi)) {
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return NULL;
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}
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#endif
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ptr = calloc(1, size);
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if (ptr == NULL) {
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nvgpu_warn(NULL, "calloc returns NULL");
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return NULL;
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}
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return ptr;
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}
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void *nvgpu_kcalloc_impl(struct gk20a *g, size_t n, size_t size, void *ip)
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{
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void *ptr;
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#ifdef NVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT
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if (nvgpu_posix_fault_injection_handle_call(&kmem_fi)) {
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return NULL;
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}
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#endif
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ptr = calloc(1, (nvgpu_safe_mult_u64(n, size)));
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if (ptr == NULL) {
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nvgpu_warn(NULL, "calloc returns NULL");
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return NULL;
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}
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return ptr;
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}
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void *nvgpu_vmalloc_impl(struct gk20a *g, unsigned long size, void *ip)
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{
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return nvgpu_kmalloc_impl(g, size, ip);
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}
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void *nvgpu_vzalloc_impl(struct gk20a *g, unsigned long size, void *ip)
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{
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return nvgpu_kzalloc_impl(g, size, ip);
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}
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void nvgpu_kfree_impl(struct gk20a *g, void *addr)
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{
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free(addr);
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}
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void nvgpu_vfree_impl(struct gk20a *g, void *addr)
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{
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nvgpu_kfree_impl(g, addr);
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}
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void *nvgpu_big_alloc_impl(struct gk20a *g, size_t size, bool clear)
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{
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if (clear) {
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return nvgpu_kzalloc(g, size);
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} else {
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return nvgpu_kmalloc(g, size);
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}
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}
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void nvgpu_big_free(struct gk20a *g, void *p)
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{
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nvgpu_kfree_impl(g, p);
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}
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int nvgpu_kmem_init(struct gk20a *g)
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{
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#ifdef NVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT
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if (nvgpu_posix_fault_injection_handle_call(&kmem_fi)) {
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return -ENOMEM;
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}
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#endif
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/* Nothing to init at the moment. */
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return 0;
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}
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void nvgpu_kmem_fini(struct gk20a *g, int flags)
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{
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}
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