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e1df72771b
Move fields in struct gk20a related to interrupt handling into Linux specific nvgpu_os_linux. At the same time move the counter logic from function in HAL into Linux specific code, and two Linux specific power management functions from generic gk20a.c to Linux specific module.c. JIRA NVGPU-123 Change-Id: I0a08fd2e81297c8dff7a85c263ded928496c4de0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1528177 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sourab Gupta <sourabg@nvidia.com> GVS: Gerrit_Virtual_Submit
101 lines
2.0 KiB
C
101 lines
2.0 KiB
C
/*
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* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef NVGPU_OS_LINUX_H
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#define NVGPU_OS_LINUX_H
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#include <linux/cdev.h>
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#include "gk20a/gk20a.h"
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struct nvgpu_os_linux {
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struct gk20a g;
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struct device *dev;
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struct {
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struct cdev cdev;
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struct device *node;
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} channel;
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struct {
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struct cdev cdev;
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struct device *node;
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} ctrl;
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struct {
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struct cdev cdev;
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struct device *node;
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} as_dev;
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struct {
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struct cdev cdev;
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struct device *node;
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} dbg;
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struct {
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struct cdev cdev;
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struct device *node;
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} prof;
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struct {
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struct cdev cdev;
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struct device *node;
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} tsg;
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struct {
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struct cdev cdev;
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struct device *node;
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} ctxsw;
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struct {
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struct cdev cdev;
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struct device *node;
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} sched;
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dev_t cdev_region;
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struct devfreq *devfreq;
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struct device_dma_parameters dma_parms;
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atomic_t hw_irq_stall_count;
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atomic_t hw_irq_nonstall_count;
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wait_queue_head_t sw_irq_stall_last_handled_wq;
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atomic_t sw_irq_stall_last_handled;
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atomic_t nonstall_ops;
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wait_queue_head_t sw_irq_nonstall_last_handled_wq;
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atomic_t sw_irq_nonstall_last_handled;
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struct work_struct nonstall_fn_work;
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struct workqueue_struct *nonstall_work_queue;
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};
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static inline struct nvgpu_os_linux *nvgpu_os_linux_from_gk20a(struct gk20a *g)
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{
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return container_of(g, struct nvgpu_os_linux, g);
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}
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static inline struct device *dev_from_gk20a(struct gk20a *g)
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{
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return nvgpu_os_linux_from_gk20a(g)->dev;
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}
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#define INTERFACE_NAME "nvhost%s-gpu"
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#endif
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