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e4285740a4
Modify the prints for certain OS API return values for non safe build. Jira NVGPU-4987 Change-Id: I7c3eba58b5c685fbf654b7093e4d2180e02c49a6 Signed-off-by: ajesh <akv@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2324992 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: Shashank Singh <shashsingh@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
102 lines
2.9 KiB
C
102 lines
2.9 KiB
C
/*
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* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/bug.h>
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#include <nvgpu/log.h>
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#include <nvgpu/lock.h>
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void nvgpu_mutex_init(struct nvgpu_mutex *mutex)
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{
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int err = pthread_mutex_init(&mutex->lock.mutex, NULL);
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nvgpu_assert(err == 0);
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}
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void nvgpu_mutex_acquire(struct nvgpu_mutex *mutex)
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{
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nvgpu_posix_lock_acquire(&mutex->lock);
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}
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void nvgpu_mutex_release(struct nvgpu_mutex *mutex)
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{
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nvgpu_posix_lock_release(&mutex->lock);
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}
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int nvgpu_mutex_tryacquire(struct nvgpu_mutex *mutex)
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{
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return ((nvgpu_posix_lock_try_acquire(&mutex->lock) == 0) ? 1 : 0);
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}
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void nvgpu_mutex_destroy(struct nvgpu_mutex *mutex)
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{
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#ifndef CONFIG_NVGPU_NON_FUSA
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int err = pthread_mutex_destroy(&mutex->lock.mutex);
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if (err != 0) {
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nvgpu_info(NULL, "Mutex destroy error %d", err);
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}
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nvgpu_assert(err == 0);
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#else
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(void) pthread_mutex_destroy(&mutex->lock.mutex);
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#endif
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}
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void nvgpu_spinlock_init(struct nvgpu_spinlock *spinlock)
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{
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int err = pthread_mutex_init(&spinlock->lock.mutex, NULL);
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if (err != 0) {
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nvgpu_err(NULL, "OS API pthread_mutex_init error = %d", err);
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}
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#ifndef CONFIG_NVGPU_NON_FUSA
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nvgpu_assert(err == 0);
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#endif
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}
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void nvgpu_spinlock_acquire(struct nvgpu_spinlock *spinlock)
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{
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nvgpu_posix_lock_acquire(&spinlock->lock);
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}
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void nvgpu_spinlock_release(struct nvgpu_spinlock *spinlock)
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{
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nvgpu_posix_lock_release(&spinlock->lock);
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}
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void nvgpu_raw_spinlock_init(struct nvgpu_raw_spinlock *spinlock)
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{
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int err = pthread_mutex_init(&spinlock->lock.mutex, NULL);
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if (err != 0) {
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nvgpu_err(NULL, "OS API pthread_mutex_init error = %d", err);
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}
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#ifndef CONFIG_NVGPU_NON_FUSA
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nvgpu_assert(err == 0);
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#endif
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}
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void nvgpu_raw_spinlock_acquire(struct nvgpu_raw_spinlock *spinlock)
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{
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nvgpu_posix_lock_acquire(&spinlock->lock);
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}
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void nvgpu_raw_spinlock_release(struct nvgpu_raw_spinlock *spinlock)
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{
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nvgpu_posix_lock_release(&spinlock->lock);
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}
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