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e7f9de6567
Added implementation for following IOCTLs NVGPU_NVS_CTRL_FIFO_CREATE_QUEUE NVGPU_NVS_CTRL_FIFO_RELEASE_QUEUE The above ioctls are supported only for users with R/W permissions. 1) NVGPU_NVS_CTRL_FIFO_CREATE_QUEUE constructs a memory region via the nvgpu_dma_alloc_sys() API and creates the corresponding GPU and kernel mappings. Upon successful creation, KMD exports this buffer to the userspace via a dmabuf fd that the UMD can use to mmap it into its process address space. 2) Added plumbing to store VMA's corresponding to different users for event queue in future. 3) Added necessary validation checks for the IOCTLs 4) NVGPU_NVS_CTRL_FIFO_RELEASE_QUEUE is used to clear the queues. 5) Using a global queue lock to protect access to the queues. This could be modified to be more fine-grained in future when there is more clarity on GSP's implementation and access of queues. 6) Added plumbing to enable user subscription to queues. NVGPU_NVS_CTRL_FIFO_RELEASE_QUEUE is used to unsubscribe the user from the queue. Once, the last user is deleted, all the queues will be cleared. User must ensure that any mappings are removed before calling release queue. 7) Set the default queue_size for event queues to PAGE_SIZE. This can be modified later. For event queues, UMD shall fetch the queue_size. Jira NVGPU-8129 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Change-Id: I31633174e960ec6feb77caede9d143b3b3c145d7 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2723198 Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> GVS: Gerrit_Virtual_Submit
69 lines
2.2 KiB
C
69 lines
2.2 KiB
C
/*
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* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef NVGPU_DMABUF_NVS_H
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#define NVGPU_DMABUF_NVS_H
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#include <nvgpu/types.h>
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#include <nvgpu/list.h>
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struct dma_buf;
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struct gk20a;
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struct nvgpu_nvs_linux_buf_priv {
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struct dma_buf *dmabuf;
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bool read_only;
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u32 ref;
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struct nvgpu_list_node list_mapped_user_vmas;
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};
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struct nvgpu_nvs_domain_ctrl_fifo_user_vma {
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struct nvgpu_nvs_ctrl_queue *buf;
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struct vm_area_struct *vma;
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struct nvgpu_list_node node;
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};
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/**
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* @brief Construct a buffer for use as a shared message passing
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* queue between user and backend scheduler. Function is
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* not safe from concurrent access by multiple external
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* users. Must be invoked between the calls of
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* nvgpu_nvs_ctrl_fifo_lock_queues() and
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* nvgpu_nvs_ctrl_fifo_unlock_queues().
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*
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* @param g instance of struct gk20a.
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* @param buf instance of struct nvgpu_nvs_ctrl_queue to contain
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* the constructed buffer metadata.
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* @param bytes size of buffer requested.
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* @param mask Mask of queue requested.
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* @param read_only Indicates whether a read-only buffer is requested.
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* @return int 0 on success, else fail.
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*/
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int nvgpu_nvs_get_buf_linux(struct gk20a *g, struct nvgpu_nvs_ctrl_queue *buf,
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size_t bytes, u8 mask, bool read_only);
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/**
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* @brief Check whether user mappings exist for this buffer.
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*
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* @param g instance of struct gk20a.
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* @param buf instance of struct nvgpu_nvs_ctrl_queue.
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* @return true User mappings exist.
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* @return false User mappings doesn't exist.
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*/
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bool nvgpu_nvs_buf_linux_is_mapped(struct gk20a *g, struct nvgpu_nvs_ctrl_queue *buf);
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#endif /* NVGPU_DMABUF_NVS_H */
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