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The NVGPU_DMA_NO_KERNEL_MAPPING flag is going away, and these functions are no longer used. Delete them. Change-Id: I0084d64c92783dd65306871e5cf6bd6366087caf Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1761581 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
200 lines
5.1 KiB
C
200 lines
5.1 KiB
C
/*
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* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/bug.h>
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#include <nvgpu/dma.h>
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#include <nvgpu/gmmu.h>
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#include <nvgpu/kmem.h>
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#include <nvgpu/nvgpu_mem.h>
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/*
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* DMA memory buffers - obviously we don't really have DMA in userspace but we
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* can emulate a lot of the DMA mem functionality for unit testing purposes.
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*/
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u32 nvgpu_mem_rd32(struct gk20a *g, struct nvgpu_mem *mem, u32 w)
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{
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u32 *mem_ptr = (u32 *)mem->cpu_va;
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return mem_ptr[w];
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}
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u32 nvgpu_mem_rd(struct gk20a *g, struct nvgpu_mem *mem, u32 offset)
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{
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if (offset & 0x3)
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BUG();
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return nvgpu_mem_rd32(g, mem, offset >> 2);
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}
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void nvgpu_mem_rd_n(struct gk20a *g, struct nvgpu_mem *mem, u32 offset,
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void *dest, u32 size)
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{
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if (offset & 0x3 || size & 0x3)
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BUG();
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memcpy(dest, ((char *)mem->cpu_va) + offset, size);
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}
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void nvgpu_mem_wr32(struct gk20a *g, struct nvgpu_mem *mem, u32 w, u32 data)
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{
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u32 *mem_ptr = (u32 *)mem->cpu_va;
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mem_ptr[w] = data;
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}
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void nvgpu_mem_wr(struct gk20a *g, struct nvgpu_mem *mem, u32 offset, u32 data)
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{
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if (offset & 0x3)
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BUG();
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nvgpu_mem_wr32(g, mem, offset >> 2, data);
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}
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void nvgpu_mem_wr_n(struct gk20a *g, struct nvgpu_mem *mem, u32 offset,
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void *src, u32 size)
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{
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if (offset & 0x3 || size & 0x3)
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BUG();
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memcpy(((char *)mem->cpu_va) + offset, src, size);
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}
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void nvgpu_memset(struct gk20a *g, struct nvgpu_mem *mem, u32 offset,
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u32 c, u32 size)
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{
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memset(((char *)mem->cpu_va) + offset, c, size);
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}
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/*
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* These functions are somewhat meaningless.
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*/
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u64 nvgpu_mem_get_addr(struct gk20a *g, struct nvgpu_mem *mem)
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{
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return (u64)(uintptr_t)mem->cpu_va;
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}
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u64 nvgpu_mem_get_phys_addr(struct gk20a *g, struct nvgpu_mem *mem)
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{
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return (u64)(uintptr_t)mem->cpu_va;
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}
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static struct nvgpu_sgl *nvgpu_mem_sgl_next(struct nvgpu_sgl *sgl)
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{
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return NULL;
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}
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static u64 nvgpu_mem_sgl_phys(struct gk20a *g, struct nvgpu_sgl *sgl)
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{
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struct nvgpu_mem *mem = (struct nvgpu_mem *)sgl;
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return (u64)(uintptr_t)mem->cpu_va;
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}
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static u64 nvgpu_mem_sgl_dma(struct nvgpu_sgl *sgl)
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{
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struct nvgpu_mem *mem = (struct nvgpu_mem *)sgl;
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return (u64)(uintptr_t)mem->cpu_va;
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}
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static u64 nvgpu_mem_sgl_length(struct nvgpu_sgl *sgl)
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{
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struct nvgpu_mem *mem = (struct nvgpu_mem *)sgl;
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return (u64)mem->aligned_size;
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}
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static u64 nvgpu_mem_sgl_gpu_addr(struct gk20a *g, struct nvgpu_sgl *sgl,
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struct nvgpu_gmmu_attrs *attrs)
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{
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struct nvgpu_mem *mem = (struct nvgpu_mem *)sgl;
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return mem->gpu_va;
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}
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static bool nvgpu_mem_sgt_iommuable(struct gk20a *g, struct nvgpu_sgt *sgt)
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{
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return nvgpu_iommuable(g);
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}
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static void nvgpu_mem_sgt_free(struct gk20a *g, struct nvgpu_sgt *sgt)
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{
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nvgpu_kfree(g, sgt);
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}
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static struct nvgpu_sgt_ops nvgpu_sgt_posix_ops = {
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.sgl_next = nvgpu_mem_sgl_next,
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.sgl_phys = nvgpu_mem_sgl_phys,
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.sgl_dma = nvgpu_mem_sgl_dma,
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.sgl_length = nvgpu_mem_sgl_length,
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.sgl_gpu_addr = nvgpu_mem_sgl_gpu_addr,
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.sgt_iommuable = nvgpu_mem_sgt_iommuable,
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.sgt_free = nvgpu_mem_sgt_free,
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};
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struct nvgpu_sgt *nvgpu_sgt_create_from_mem(struct gk20a *g,
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struct nvgpu_mem *mem)
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{
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struct nvgpu_sgt *sgt = nvgpu_kzalloc(g, sizeof(*sgt));
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if (sgt == NULL)
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return NULL;
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/*
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* The userspace implementation is simple: a single 'entry' (which we
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* only need the mem struct to describe). Maybe this could be expanded
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* to be more interesting some day.
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*/
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sgt->sgl = (struct nvgpu_sgl *)mem;
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sgt->ops = &nvgpu_sgt_posix_ops;
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return sgt;
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}
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int nvgpu_mem_create_from_mem(struct gk20a *g,
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struct nvgpu_mem *dest, struct nvgpu_mem *src,
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int start_page, int nr_pages)
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{
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u64 start = start_page * PAGE_SIZE;
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u64 size = nr_pages * PAGE_SIZE;
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if (src->aperture != APERTURE_SYSMEM)
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return -EINVAL;
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/* Some silly things a caller might do... */
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if (size > src->size)
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return -EINVAL;
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if ((start + size) > src->size)
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return -EINVAL;
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memset(dest, 0, sizeof(*dest));
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dest->cpu_va = ((char *)src->cpu_va) + start;
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dest->mem_flags = src->mem_flags | NVGPU_MEM_FLAG_SHADOW_COPY;
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dest->aperture = src->aperture;
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dest->skip_wmb = src->skip_wmb;
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dest->size = size;
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return 0;
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}
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