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319520ff57
This adds a new device management unit in the common code responsible for facilitating the parsing of the GPU top device list and providing that info to other units in nvgpu. The basic idea is to read this list once from HW and store it in a set of lists corresponding to each device type (graphics, LCE, etc). Many of the HALs in top can be deleted and instead implemented using common code parsing the SW representation. Every time the driver queries the device list it does so using a device type and instance ID. This is common code. The HAL is responsible for populating the device list in such a way that the driver can query it in a chip agnostic manner. Also delete some of the unit tests for functions that no longer exist. This code will require new unit tests in time; those should be quite simple to write once unit testing is needed. JIRA NVGPU-5421 Change-Id: Ie41cd255404b90ae0376098a2d6e9f9abdd3f5ea Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2319649 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
54 lines
2.0 KiB
C
54 lines
2.0 KiB
C
/*
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* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* GM20B TOP UNIT
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*/
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#ifndef TOP_GM20B_H
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#define TOP_GM20B_H
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#include <nvgpu/types.h>
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struct gk20a;
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struct nvgpu_device;
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void gm20b_device_info_parse_enum(struct gk20a *g, u32 table_entry,
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u32 *engine_id, u32 *runlist_id,
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u32 *intr_id, u32 *reset_id);
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#ifdef CONFIG_NVGPU_HAL_NON_FUSA
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int gm20b_device_info_parse_data(struct gk20a *g, u32 table_entry, u32 *inst_id,
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u32 *pri_base, u32 *fault_id);
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u32 gm20b_get_ce_inst_id(struct gk20a *g, u32 engine_type);
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#endif
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struct nvgpu_device *gm20b_top_parse_next_dev(struct gk20a *g, u32 *i);
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u32 gm20b_top_get_max_gpc_count(struct gk20a *g);
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u32 gm20b_top_get_max_tpc_per_gpc_count(struct gk20a *g);
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u32 gm20b_top_get_max_fbps_count(struct gk20a *g);
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u32 gm20b_top_get_max_ltc_per_fbp(struct gk20a *g);
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u32 gm20b_top_get_max_lts_per_ltc(struct gk20a *g);
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u32 gm20b_top_get_num_ltcs(struct gk20a *g);
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#endif
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