mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
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a987a244c2
-Allow only usermode submit, check for gpfifo max size. -Map buffer offset must be page aligned and in multiple of page size. -Check for unmapped address whether it's alloced or not. -Offset in alloc space must be multiple of page size. -Free space offset must be in the range of alloced space. Jira NVGPU-4470 Change-Id: I9d5e4eb121d6d462f8b8d17b31c839b34d7d6c1d Signed-off-by: shashank singh <shashsingh@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2298188 Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
541 lines
17 KiB
C
541 lines
17 KiB
C
/*
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* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef UNIT_NVGPU_CHANNEL_H
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#define UNIT_NVGPU_CHANNEL_H
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#include <nvgpu/types.h>
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struct unit_module;
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struct gk20a;
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/** @addtogroup SWUTS-fifo-channel
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* @{
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*
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* Software Unit Test Specification for fifo/channel
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*/
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/**
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* Test specification for: test_channel_setup_sw
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*
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* Description: Branch coverage for nvgpu_channel_setup/cleanup_sw.
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*
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* Test Type: Feature, Error injection
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*
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* Targets: nvgpu_channel_setup_sw, nvgpu_channel_init_support,
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* nvgpu_channel_destroy, nvgpu_channel_cleanup_sw
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*
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* Input: None
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*
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* Steps:
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* - Check valid case for nvgpu_channel_setup_sw.
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* - Check valid case for nvgpu_channel_cleanup_sw.
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* - Check invalid case for nvgpu_channel_setup_sw.
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* - Failure to allocate channel contexts (by using fault injection for
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* vzalloc).
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_setup_sw(struct unit_module *m,
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_open
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*
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* Description: Branch coverage for nvgpu_channel_open_new.
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*
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* Test Type: Feature, Error injection
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*
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* Targets: nvgpu_channel_open_new, nvgpu_channel_from_free_chs
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Check that channel can be allocated with nvgpu_channel_open_new:
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* - Allocate channel w/ valid runlist_id.
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* - Allocate channel w/ invalid runlist_id (nvgpu_channel_open_new
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* should set it to GR runlist_id).
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* - Allocate w/ or w/o is_privileged_channel set.
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* - Check that aggresive_sync_destroy is set to true, if used channels
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* is above threshold (by setting threshold and forcing used_channels
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* to a greater value).
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* - Check that nvgpu_channel_open_new returns a non NULL value,
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* and that ch->g is initialized.
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* - Check channel allocation failures cases:
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* - Failure to acquire unused channel (by forcibly emptying f->free_chs).
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* - Failure to allocate channel instance (by using stub for
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* g->ops.channel.alloc_inst).
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* - Channel is not referenceable (by forcing ch->referenceable = false and
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* checking that WARN occurs).
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* - Channel is in use (by forcing ch->ref_count > 0 and checking that
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* WARN occurs).
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* - Allocated channel invalid (by forcing ch->g to NULL value
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* and checking that BUG occurs).
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* In negative testing case, original state is restored after checking
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* that nvgpu_channel_open_new failed.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_open(struct unit_module *m,
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_close
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*
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* Description: Branch coverage for nvgpu_channel_close/kill.
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_channel_close, nvgpu_channel_kill, channel_free,
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* channel_free_invoke_unbind, channel_free_wait_for_refs,
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* channel_free_invoke_deferred_engine_reset,
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* channel_free_invoke_sync_destroy,
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* channel_free_put_deterministic_ref_from_init,
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* channel_free_unlink_debug_session, nvgpu_channel_as_bound,
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* nvgpu_channel_wait_until_counter_is_N,
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* nvgpu_channel_free_usermode_buffers
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Check valid cases for nvgpu_channel_close/kill:
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* - Closing channel w/ force = false (nvgpu_channel_close).
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* - Closing channel w/ force = true (nvgpu_channel_kill).
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* - Check that g->os_channel.close is called when defined (by using stub).
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* - Closing a channel bound to TSG.
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* - Closing a channel with bound AS (by bounding it to dummy VM, and
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* checking that ref count is decremented).
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* - Check that g->ops.gr.setup.free_subctx is called when defined.
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* - Once closed, check that ch->g is NULL, channel is in list of free
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* channels, and that it is not referenceable.
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* - Check invalid cases:
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* - Closing a channel while driver is dying (unbind is skipped when
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* driver is dying).
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* - Channel already freed (by closing it twice, and checking that BUG
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* occurs for second invokation).
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_close(struct unit_module *m, struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_setup_bind
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*
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* Description: Branch coverage for nvgpu_channel_setup_bind.
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*
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* Test Type: Feature, Error injection, Boundary values
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*
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* Targets: nvgpu_channel_setup_bind, nvgpu_channel_setup_usermode,
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* nvgpu_channel_as_bound, nvgpu_channel_update_runlist
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Check valid cases for nvgpu_channel_setup_bind:
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* - Allocate channel and TSG.
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* - Bind channel to TSG.
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* - Allocate dummy pdb_mem, and set dummy VM for ch->vm
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* - Call nvgpu_channel_setup_bind.
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* - Check that g->os_channel.alloc_usermode_buffers is called (by using
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* stub), and that ch->usermode_submit_enabled is true.
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* - Check that g->ops.runlist.update_for_channel is called for this
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* channel (by using stub).
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* - Check that channel is bound (ch->bound = true).
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* - Check invalid cases for nvgpu_channel_setup_bind:
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* - Channel does not have address space (by setting ch->vm = NULL).
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* - Channel already has GPFIFO set up (by allocating dummy ch->gpfifo.mem).
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* - Usermode submit is already set for this channel (by forcing
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* ch->usermode).
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* - Closing a channel while driver is dying (unbind is skipped when
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* drive is dying).
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* - Channel already freed (by closing it twice, and checking that BUG
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* occurs for second invokation).
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* For invalid cases, check that error is returned, and that channel does not
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* have valid userd or gpfifo.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_setup_bind(struct unit_module *m,
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_alloc_inst
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*
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* Description: Branch coverage for nvgpu_channel_alloc_inst.
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*
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* Test Type: Feature, Error injection
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*
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* Targets: nvgpu_channel_alloc_inst, nvgpu_channel_free_inst
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Check valid cases for nvgpu_channel_alloc_inst:
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* - Open a channel with nvgpu_channel_open_new, and check that
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* nvgpu_channel_alloc_inst returns valid DMA memory for ch->inst_block
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* (aperture != INVALID).
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* - Free channel instance with nvgpu_channel_free_inst and check
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* that ch->inst_block has now an invalid aperture.
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* - Check invalid cases for nvgpu_channel_alloc_inst:
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* - Enable fault injection for DMA allocation, check that
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* nvgpu_channel_alloc_inst fails and that ch->inst_block.aperture
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* is invalid.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_alloc_inst(struct unit_module *m,
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_from_inst
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*
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* Description: Branch coverage for nvgpu_channel_refch_from_inst_ptr.
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_channel_refch_from_inst_ptr, nvgpu_inst_block_addr
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Check valid cases for nvgpu_channel_refch_from_inst_ptr:
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* - Allocate 2 channels each with its instance block.
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* - Check that chA is retrieved from instA.
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* - Check that chB is retrieved from instB.
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* - Check that refcount is incremented for channel.
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* - Check invalid cases for nvgpu_channel_refch_from_inst_ptr:
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* - Pass invalid inst_ptr and check that no channel is found.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_from_inst(struct unit_module *m,
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_enable_disable_tsg
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*
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* Description: Branch coverage for nvgpu_channel_enable/disable_tsg.
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_channel_enable_tsg, nvgpu_channel_disable_tsg
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Allocate channel and TSG, and bind them.
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* - Check that g->ops.tsg.enable is called for TSG when
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* nvgpu_channel_enable_tsg is called for ch (by using stub).
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* - Check that g->ops.tsg.disable is called for TSG when
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* nvgpu_channel_disable_tsg is called for ch (by using stub).
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* - Unbind channel from TSG, and check that nvgpu_channel_enable_tsg
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* and nvgpu_channel_disable_tsg return an error.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_enable_disable_tsg(struct unit_module *m,
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_abort
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*
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* Description: Test channel TSG abort
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_channel_abort
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Test that TSG abort is invoked for TSG bound channel.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_abort(struct unit_module *m, struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_mark_error
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*
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* Description: Mark channel as unserviceable
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_channel_mark_error, nvgpu_channel_set_unserviceable,
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* nvgpu_channel_ctxsw_timeout_debug_dump_state,
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* nvgpu_channel_set_has_timedout_and_wakeup_wqs
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Test that the channel can be marked with error (unserviceable).
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* - Test broadcast condition fail cases.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_mark_error(struct unit_module *m,
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_sw_quiesce
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*
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* Description: Test emergency quiescing of channels
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_channel_sw_quiesce, nvgpu_channel_set_error_notifier,
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* gops_channel.set_error_notifier
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Check if channel can be placed in quiesce state.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_sw_quiesce(struct unit_module *m,
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_deterministic_idle_unidle
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*
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* Description: Stop and allow deterministic channel activity
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*
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* Test Type: Feature, Error injection
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*
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* Targets: nvgpu_channel_deterministic_idle,
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* nvgpu_channel_deterministic_unidle, nvgpu_channel_from_id__func
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Execute deterministic idle and unidle functions and check if gpu usage
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* usage count is updated corresponding to input conditions.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_deterministic_idle_unidle(struct unit_module *m,
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_suspend_resume_serviceable_chs
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*
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* Description: Test suspend resume of all servicable channels
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_channel_suspend_all_serviceable_ch,
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* gops_channel.suspend_all_serviceable_ch,
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* nvgpu_channel_resume_all_serviceable_ch,
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* gops_channel.resume_all_serviceable_ch,
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* nvgpu_channel_check_unserviceable
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Check if channels can be suspended and resumed.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_suspend_resume_serviceable_chs(struct unit_module *m,
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_debug_dump
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*
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* Description: Dump channel debug information
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*
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* Test Type: Feature, Error injection
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*
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* Targets: nvgpu_channel_debug_dump_all
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Dump all debug information for channels.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_debug_dump(struct unit_module *m,
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_semaphore_wakeup
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*
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* Description: Wake up threads waiting for semaphore
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_channel_semaphore_wakeup, nvgpu_channel_get__func
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Execute semaphore_wakeup for deterministic/non-deterministic channels.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_semaphore_wakeup(struct unit_module *m,
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_from_invalid_id
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*
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* Description: Test channel reference extracted using channel id
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_channel_from_id
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Test corner case to retrieve channel with invalid channel id.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_from_invalid_id(struct unit_module *m, struct gk20a *g,
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void *vargs);
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/**
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* Test specification for: test_channel_put_warn
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*
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* Description: Test channel dereference
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_channel_put__func
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Test corner cases using referenceable channel and condition broadcast fail
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* cases.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_put_warn(struct unit_module *m, struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_ch_referenceable_cleanup
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*
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* Description: Test channel cleanup corner case
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_channel_cleanup_sw
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Open a channel. Test how referenceable channel is cleaned-up/freed.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_ch_referenceable_cleanup(struct unit_module *m,
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_abort_cleanup
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*
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* Description: Test channel abort cleanup with user_sync available
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_channel_abort_clean_up
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Bind channel to TSG and allocate channel user_sync. Test channel abort
|
|
* cleanup while unbinding from TSG.
|
|
*
|
|
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
|
|
*/
|
|
int test_channel_abort_cleanup(struct unit_module *m, struct gk20a *g,
|
|
void *vargs);
|
|
|
|
/**
|
|
* Test specification for: test_nvgpu_channel_commit_va
|
|
*
|
|
* Description: Test channel address space commit
|
|
*
|
|
* Test Type: Feature
|
|
*
|
|
* Targets: nvgpu_channel_commit_va
|
|
*
|
|
* Input: test_fifo_init_support() run for this GPU
|
|
*
|
|
* Steps:
|
|
* - Pass channel pointer to the function which executes init_inst_block stub.
|
|
* - Check that gmmu_page_size value copied as stub.count is correct.
|
|
*
|
|
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
|
|
*/
|
|
int test_nvgpu_channel_commit_va(struct unit_module *m, struct gk20a *g,
|
|
void *vargs);
|
|
|
|
/**
|
|
* Test specification for: test_nvgpu_get_gpfifo_entry_size
|
|
*
|
|
* Description: Verify gpfifo entry size
|
|
*
|
|
* Test Type: Feature
|
|
*
|
|
* Targets: nvgpu_get_gpfifo_entry_size
|
|
*
|
|
* Input: test_fifo_init_support() run for this GPU
|
|
*
|
|
* Steps:
|
|
* - Get gpfifo entry size and verify that its set to zero.
|
|
*
|
|
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
|
|
*/
|
|
int test_nvgpu_get_gpfifo_entry_size(struct unit_module *m, struct gk20a *g,
|
|
void *vargs);
|
|
|
|
/**
|
|
* Test specification for: test_trace_write_pushbuffers
|
|
*
|
|
* Description: Test write to ftrace pushbuffers
|
|
*
|
|
* Test Type: Feature
|
|
*
|
|
* Targets: trace_write_pushbuffers
|
|
*
|
|
* Input: test_fifo_init_support() run for this GPU
|
|
*
|
|
* Steps:
|
|
* - Write to pushbuffer in ftrace, this function is no-op.
|
|
*
|
|
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
|
|
*/
|
|
int test_trace_write_pushbuffers(struct unit_module *m, struct gk20a *g,
|
|
void *vargs);
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#endif /* UNIT_NVGPU_CHANNEL_H */
|