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This patch adds new channel and sync test to improve coverage. This patch also updates SWUTs target tag to increase function traceability and updates test type. Jira NVGPU-4817 Change-Id: I52a7fa27f61e7e465d2ede25b92745413f17e50b Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280963 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
81 lines
2.5 KiB
C
81 lines
2.5 KiB
C
/*
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* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef UNIT_FIFO_RAMIN_GK20A_FUSA_H
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#define UNIT_FIFO_RAMIN_GK20A_FUSA_H
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#include <nvgpu/types.h>
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struct unit_module;
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struct gk20a;
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/** @addtogroup SWUTS-fifo-ramin-gk20a
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* @{
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*
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* Software Unit Test Specification for fifo/ramin/gk20a
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*/
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/**
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* Test specification for: test_gk20a_ramin_base_shift
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*
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* Description: Test gk20a base shift value
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*
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* Test Type: Feature
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*
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* Targets: gops_ramin.base_shift, gk20a_ramin_base_shift
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*
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* Input: None
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*
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* Steps:
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* - Check that instance block shift (in bits) is correct as per hardware
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* manual. This gives number of zeros in instance block physical address and
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* thus defines alignment.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_gk20a_ramin_base_shift(struct unit_module *m, struct gk20a *g,
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void *args);
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/**
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* Test specification for: test_gk20a_ramin_alloc_size
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*
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* Description: Test gk20a alloc size
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*
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* Test Type: Feature
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*
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* Targets: gops_ramin.alloc_size, gk20a_ramin_alloc_size
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*
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* Input: None
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*
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* Steps:
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* - Check instance block alloc size is correct as per hardware manuals.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_gk20a_ramin_alloc_size(struct unit_module *m, struct gk20a *g,
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void *args);
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/**
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* @}
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*/
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#endif /* UNIT_FIFO_RAMIN_GK20A_FUSA_H */
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