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The scrubber binary after completion updates its return code in mailbox register 0. The memory unlock code reads this registers to determine the success of memory scrubbing. This register is initialized to 0 during nvdec falcon reset. If the scrubber binary halts due to an error condition, the return code is not updated and it stays at 0. Initialize the status register explicitly to non-zero value helps avoid just false positives. Add falcon register dump and PC trace to help debug the memory unlock failures. Change-Id: I3086dda2a9719c2d0b8a7ae898f1a03bedfa21b0 Signed-off-by: Tejal Kudav <tkudav@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1808899 Reviewed-by: Deepak Goyal <dgoyal@nvidia.com> Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>