Files
linux-nvgpu/drivers/gpu/nvgpu/common/gr/gr_priv.h
Deepak Nibade 6745b0685e gpu: nvgpu: support resetting each GR instance
Add a new header file <nvgpu/gr/gr_instances.h> that supports below
macros to execute various functions for GR instances

1) nvgpu_gr_exec_for_each_instance
   Execute a function for each GR instance by configuring GR remap
   window for that instance. Function being executed returns void.

2) nvgpu_gr_exec_with_ret_for_each_instance
   Execute a function for each GR instance by configuring GR remap
   window for that instance. Function being executed returns an error.

3) nvgpu_gr_exec_for_all_instances
   Execute a function for all GR instances at once. For this GR remap
   window needs to be disabled temporarily.

If CONFIG_NVGPU_MIG is disabled, all above macros will turn into simple
funciton calls.
If CONFIG_NVGPU_MIG is disabled or if runtime flag  NVGPU_SUPPORT_MIG is
disabled, all above macros will turn into simple function calls that
configure single GR instance.

Separate out GR engine reset code into new API gr_reset_engine() and
execute it with nvgpu_gr_exec_with_ret_for_each_instance().

PROD values need to be loaded in legacy mode, hence call
nvgpu_cg_init_gr_load_gating_prod() inside
nvgpu_gr_exec_for_all_instances().

Rename gr_init_prepare_hw() to more appropriate
gr_reset_hw_and_load_prod()

Moe gops.gr.init.fifo_access() call to gr_init_reset_enable_hw().

Add new API nvgpu_grmgr_get_gr_syspipe_id() to query GR instance syspipe
id from common.grmgr unit. Add nvgpu_gr_get_syspipe_id() that returns
same value stored in nvgpu_gr struct.

Add cur_gr_instance field to struct nvgpu_gr to track current GR
instance being programmed under remap window.

Jira NVGPU-5648

Change-Id: I86920303427a6e6547ebf195daa37438365bb38e
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2403550
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:13:28 -06:00

139 lines
3.4 KiB
C

/*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_GR_PRIV_H
#define NVGPU_GR_PRIV_H
#include <nvgpu/types.h>
#include <nvgpu/cond.h>
struct nvgpu_gr_ctx_desc;
struct nvgpu_gr_global_ctx_buffer_desc;
struct nvgpu_gr_obj_ctx_golden_image;
struct nvgpu_gr_config;
#ifdef CONFIG_NVGPU_GRAPHICS
struct nvgpu_gr_zbc;
struct nvgpu_gr_zcull;
#endif
#ifdef CONFIG_NVGPU_DEBUGGER
struct nvgpu_gr_hwpm_map;
#endif
/**
* GR engine data structure.
*
* This is the parent structure to all other GR engine data structures,
* and holds a pointer to all of them. This structure also stores
* various fields to track GR engine initialization state.
*
* Pointer to this structure is maintained in GPU driver structure.
*/
struct nvgpu_gr {
/**
* Pointer to GPU driver struct.
*/
struct gk20a *g;
/**
* Condition variable for GR initialization.
* Waiters shall wait on this condition to ensure GR engine
* is initialized.
*/
struct nvgpu_cond init_wq;
/**
* Flag to indicate if GR engine is initialized.
*/
bool initialized;
/**
* Syspipe ID of the GR instance.
*/
u32 syspipe_id;
/**
* Pointer to global context buffer descriptor structure.
*/
struct nvgpu_gr_global_ctx_buffer_desc *global_ctx_buffer;
/**
* Pointer to Golden context image structure.
*/
struct nvgpu_gr_obj_ctx_golden_image *golden_image;
/**
* Pointer to GR context descriptor structure.
*/
struct nvgpu_gr_ctx_desc *gr_ctx_desc;
/**
* Pointer to GR configuration structure.
*/
struct nvgpu_gr_config *config;
/**
* Pointer to GR falcon data structure.
*/
struct nvgpu_gr_falcon *falcon;
/**
* Pointer to GR interrupt data structure.
*/
struct nvgpu_gr_intr *intr;
/**
* Function pointer to remove GR s/w support.
*/
void (*remove_support)(struct gk20a *g);
/**
* Flag to indicate GR s/w has been initialized.
*/
bool sw_ready;
#ifdef CONFIG_NVGPU_DEBUGGER
struct nvgpu_gr_hwpm_map *hwpm_map;
#endif
#ifdef CONFIG_NVGPU_GRAPHICS
struct nvgpu_gr_zcull *zcull;
struct nvgpu_gr_zbc *zbc;
#endif
#ifdef CONFIG_NVGPU_NON_FUSA
u32 fecs_feature_override_ecc_val;
#endif
#ifdef CONFIG_NVGPU_CILP
u32 cilp_preempt_pending_chid;
#endif
#if defined(CONFIG_NVGPU_RECOVERY) || defined(CONFIG_NVGPU_DEBUGGER)
struct nvgpu_mutex ctxsw_disable_mutex;
int ctxsw_disable_count;
#endif
};
#endif /* NVGPU_GR_PRIV_H */