Antony Clince Alex d7a1e0d4c9 gpu: nvgpu: update fmodel ctx_var init to add missing pm lists ...

Update netlist parsing logic for fmodel to include the following lists:
- LIST_compressed_pm_ctx_reg_ROP
- LIST_compressed_pm_ctx_reg_unicast_GPC
- LIST_compressed_pm_fbpa_ctx_regs
- LIST_compressed_pm_ctx_reg_CAU
- LIST_nv_perf_fbp_control_ctx_regs
- LIST_nv_perf_gpc_control_ctx_regs
- LIST_nv_perf_pma_control_ctx_regs

Jira NVGPU-4711

Change-Id: Ie62784941c86ad42e06228875dea3254d8714be9
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2391709
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit

2020-12-15 14:13:28 -06:00

..

sim_netlist.c

gpu: nvgpu: update fmodel ctx_var init to add missing pm lists

2020-12-15 14:13:28 -06:00

sim_pci.c

gpu: nvgpu: sim: defer sim buffers allocation

2020-12-15 14:13:28 -06:00

sim.c

gpu: nvgpu: sim: defer sim buffers allocation

2020-12-15 14:13:28 -06:00