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On simulation platforms the netlist data is fetched from fmodel chiplib. The chiplib has been updated to include certain pm, perf registers which were already present in the netimage. Update sim netlist parsing to fetch the following list of registers: - LIST_pm_ctx_reg_PPC - LIST_nv_perf_ctx_reg_SYS - LIST_nv_perf_sysrouter_ctx_regs - LIST_nv_perf_pma_ctx_regs - LIST_nv_perf_fbp_ctx_regs - LIST_nv_perf_fbprouter_ctx_regs - LIST_nv_perf_ctx_reg_GPC - LIST_nv_perf_gpcrouter_ctx_regs - LIST_pm_ltc_ctx_regs Bug 2916121 Change-Id: Ida8e02f97f9ae3fc3d89ee6c9e890fe5e441aaa0 Signed-off-by: Antony Clince Alex <aalex@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2369866 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit