seshendra Gadagottu f04a84b7ce gpu: nvgpu: gv11b: chip specific init_elcg_mode ...

Added thermal registers for gv11b. Implemented chip specific
init_elcg_mode. In thermal control register, engine power auto
control config is removed and added new field for engine holdoff
enable signal.

JIRA GV11B-58

Change-Id: I412d9a232800d25efbdb0a40f14949d3f085fb0e
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1300119
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

2017-02-07 15:16:53 -08:00

..

nvgpu

gpu: nvgpu: gv11b: chip specific init_elcg_mode

2017-02-07 15:16:53 -08:00