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Adeel Raza f0a9ce0469 gpu: nvgpu: SM/TEX exception handling support 
Add TEX exception handling support. Also make SM exception handler into
a function pointer, which should allow different chips to implement
their own SM exception handling routine.

Bug 1635727
Bug 1637486

Change-Id: I429905726c1840c11e83780843d82729495dc6a5
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/935329
2016-01-29 14:40:11 -08:00
..
nvgpu
gpu: nvgpu: SM/TEX exception handling support
2016-01-29 14:40:11 -08:00