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5ec241a1d8
On safety nonstall interrupt is not used and should be compiled out to rule out any chance of interference with safety code. Remove top handler support of nonstall interrupt for safety which is currently not applicable to linux. Jira NVGPU-7066 Jira NVGPU-4078 Change-Id: I278efc8da6ddd0f22c128af6630cfd1b20ba4784 Signed-off-by: Shashank Singh <shashsingh@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2589006 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2671586 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
84 lines
2.7 KiB
C
84 lines
2.7 KiB
C
/*
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* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/types.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/engines.h>
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#include <nvgpu/device.h>
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#include <nvgpu/ce.h>
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#include <nvgpu/power_features/cg.h>
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#include <nvgpu/cic_mon.h>
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#include <nvgpu/mc.h>
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int nvgpu_ce_init_support(struct gk20a *g)
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{
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int err = 0;
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if (g->ops.ce.set_pce2lce_mapping != NULL) {
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g->ops.ce.set_pce2lce_mapping(g);
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}
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/*
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* Bug 1895019
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* Each time PCE2LCE config is updated and if it happens to
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* map a LCE which was previously unmapped, then ELCG would have turned
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* off the clock to the unmapped LCE and when the LCE config is updated,
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* a race occurs between the config update and ELCG turning on the clock
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* to that LCE, this might result in LCE dropping the config update.
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* To avoid such a race, each time PCE2LCE config is updated toggle
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* resets for all LCEs.
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*/
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err = nvgpu_mc_reset_devtype(g, NVGPU_DEVTYPE_LCE);
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if (err != 0) {
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nvgpu_err(g, "NVGPU_DEVTYPE_LCE reset failed");
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return err;
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}
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nvgpu_cg_slcg_ce2_load_enable(g);
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nvgpu_cg_blcg_ce_load_enable(g);
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#if defined(CONFIG_NVGPU_NON_FUSA)
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nvgpu_cg_elcg_ce_load_enable(g);
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#endif
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if (g->ops.ce.init_prod_values != NULL) {
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g->ops.ce.init_prod_values(g);
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}
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if (g->ops.ce.init_hw != NULL) {
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g->ops.ce.init_hw(g);
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}
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if (g->ops.ce.intr_enable != NULL) {
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g->ops.ce.intr_enable(g, true);
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}
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/** Enable interrupts at MC level */
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nvgpu_cic_mon_intr_stall_unit_config(g, NVGPU_CIC_INTR_UNIT_CE, NVGPU_CIC_INTR_ENABLE);
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#ifdef CONFIG_NVGPU_NONSTALL_INTR
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nvgpu_cic_mon_intr_nonstall_unit_config(g, NVGPU_CIC_INTR_UNIT_CE, NVGPU_CIC_INTR_ENABLE);
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#endif
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return 0;
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}
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